From: lkcl Date: Wed, 5 Apr 2023 11:44:06 +0000 (+0100) Subject: (no commit message) X-Git-Tag: opf_rfc_ls012_v1~118 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=547fe0a56eca4a9bfb49cd6f709a0c86d0aa4bcc;p=libreriscv.git --- diff --git a/openpower/sv/ldst.mdwn b/openpower/sv/ldst.mdwn index d08308cc5..bad8e41da 100644 --- a/openpower/sv/ldst.mdwn +++ b/openpower/sv/ldst.mdwn @@ -48,13 +48,14 @@ a number of different modes: * **Structure Packing** - covered in SV by [[sv/remap]] and Pack/Unpack Mode. *Despite being constructed from Scalar LD/ST none of these Modes exist -or make sense in any Scalar ISA. They **only** exist in Vector ISAs* +or make sense in any Scalar ISA. They **only** exist in Vector ISAs +and are a critical part of its value*. Also included in SVP64 LD/ST is both signed and unsigned Saturation, as well as Element-width overrides and Twin-Predication. -Note also that Indexed [[sv/remap]] mode may be applied to both v3.0 -LD/ST Immediate instructions *and* v3.0 LD/ST Indexed instructions. +Note also that Indexed [[sv/remap]] mode may be applied to both Scalar +LD/ST Immediate Defined Words *and* LD/ST Indexed Defined Words. LD/ST-Indexed should not be conflated with Indexed REMAP mode: clarification is provided below.