From: Gabe Black Date: Sat, 23 Dec 2017 00:14:03 +0000 (-0800) Subject: arch,mem: Move page table construction into the arch classes. X-Git-Tag: v19.0.0.0~2388 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=54a9d471faab2b4ab3ef26932957b2e0d496e84e;p=gem5.git arch,mem: Move page table construction into the arch classes. This gets rid of an awkward NoArchPageTable class, and also gives the arch a place to inject ISA specific parameters (specifically page size) without having to have TheISA:: in the generic version of these types. Change-Id: I1412f303460d5c43dafdb9b3cd07af81c908a441 Reviewed-on: https://gem5-review.googlesource.com/6981 Reviewed-by: Alexandru Duțu Maintainer: Gabe Black --- diff --git a/src/arch/alpha/process.cc b/src/arch/alpha/process.cc index 58fe0bdbe..3cc0b0daf 100644 --- a/src/arch/alpha/process.cc +++ b/src/arch/alpha/process.cc @@ -38,6 +38,7 @@ #include "cpu/thread_context.hh" #include "debug/Loader.hh" #include "mem/page_table.hh" +#include "params/Process.hh" #include "sim/aux_vector.hh" #include "sim/byteswap.hh" #include "sim/process_impl.hh" @@ -48,8 +49,9 @@ using namespace AlphaISA; using namespace std; AlphaProcess::AlphaProcess(ProcessParams *params, ObjectFile *objFile) - : Process(params, objFile) + : Process(params, new FuncPageTable(params->name, params->pid), objFile) { + fatal_if(!params->useArchPT, "Arch page tables not implemented."); Addr brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize(); brk_point = roundUp(brk_point, PageBytes); diff --git a/src/arch/alpha/process.hh b/src/arch/alpha/process.hh index a02b8cec4..28ecd6819 100644 --- a/src/arch/alpha/process.hh +++ b/src/arch/alpha/process.hh @@ -61,7 +61,4 @@ class AlphaProcess : public Process virtual bool mmapGrowsDown() const override { return false; } }; -/* No architectural page table defined for this ISA */ -typedef NoArchPageTable ArchPageTable; - #endif // __ARCH_ALPHA_PROCESS_HH__ diff --git a/src/arch/arm/process.cc b/src/arch/arm/process.cc index dcc9145d3..b64579a5d 100644 --- a/src/arch/arm/process.cc +++ b/src/arch/arm/process.cc @@ -51,6 +51,7 @@ #include "cpu/thread_context.hh" #include "debug/Stack.hh" #include "mem/page_table.hh" +#include "params/Process.hh" #include "sim/aux_vector.hh" #include "sim/byteswap.hh" #include "sim/process_impl.hh" @@ -62,8 +63,10 @@ using namespace ArmISA; ArmProcess::ArmProcess(ProcessParams *params, ObjectFile *objFile, ObjectFile::Arch _arch) - : Process(params, objFile), arch(_arch) + : Process(params, new FuncPageTable(params->name, params->pid), objFile), + arch(_arch) { + fatal_if(!params->useArchPT, "Arch page tables not implemented."); } ArmProcess32::ArmProcess32(ProcessParams *params, ObjectFile *objFile, diff --git a/src/arch/arm/process.hh b/src/arch/arm/process.hh index f8e6542ff..f4f0874c0 100644 --- a/src/arch/arm/process.hh +++ b/src/arch/arm/process.hh @@ -95,8 +95,5 @@ class ArmProcess64 : public ArmProcess void setSyscallReturn(ThreadContext *tc, SyscallReturn return_value); }; -/* No architectural page table defined for this ISA */ -typedef NoArchPageTable ArchPageTable; - #endif // __ARM_PROCESS_HH__ diff --git a/src/arch/mips/process.cc b/src/arch/mips/process.cc index 4d0d5e309..f3b1108f4 100644 --- a/src/arch/mips/process.cc +++ b/src/arch/mips/process.cc @@ -39,6 +39,7 @@ #include "cpu/thread_context.hh" #include "debug/Loader.hh" #include "mem/page_table.hh" +#include "params/Process.hh" #include "sim/aux_vector.hh" #include "sim/process.hh" #include "sim/process_impl.hh" @@ -48,9 +49,10 @@ using namespace std; using namespace MipsISA; -MipsProcess::MipsProcess(ProcessParams * params, ObjectFile *objFile) - : Process(params, objFile) +MipsProcess::MipsProcess(ProcessParams *params, ObjectFile *objFile) + : Process(params, new FuncPageTable(params->name, params->pid), objFile) { + fatal_if(!params->useArchPT, "Arch page tables not implemented."); // Set up stack. On MIPS, stack starts at the top of kuseg // user address space. MIPS stack grows down from here Addr stack_base = 0x7FFFFFFF; diff --git a/src/arch/mips/process.hh b/src/arch/mips/process.hh index ed6561c1a..e9e058519 100644 --- a/src/arch/mips/process.hh +++ b/src/arch/mips/process.hh @@ -58,8 +58,4 @@ class MipsProcess : public Process void setSyscallReturn(ThreadContext *tc, SyscallReturn return_value); }; -/* No architectural page table defined for this ISA */ -typedef NoArchPageTable ArchPageTable; - - #endif // __MIPS_PROCESS_HH__ diff --git a/src/arch/power/process.cc b/src/arch/power/process.cc index 4a34decf3..87e5bac9e 100644 --- a/src/arch/power/process.cc +++ b/src/arch/power/process.cc @@ -40,6 +40,7 @@ #include "cpu/thread_context.hh" #include "debug/Stack.hh" #include "mem/page_table.hh" +#include "params/Process.hh" #include "sim/aux_vector.hh" #include "sim/process_impl.hh" #include "sim/syscall_return.hh" @@ -49,8 +50,9 @@ using namespace std; using namespace PowerISA; PowerProcess::PowerProcess(ProcessParams *params, ObjectFile *objFile) - : Process(params, objFile) + : Process(params, new FuncPageTable(params->name, params->pid), objFile) { + fatal_if(!params->useArchPT, "Arch page tables not implemented."); // Set up break point (Top of Heap) Addr brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize(); diff --git a/src/arch/power/process.hh b/src/arch/power/process.hh index 08efdfeec..348e3750f 100644 --- a/src/arch/power/process.hh +++ b/src/arch/power/process.hh @@ -57,8 +57,5 @@ class PowerProcess : public Process void setSyscallReturn(ThreadContext *tc, SyscallReturn return_value); }; -/* No architectural page table defined for this ISA */ -typedef NoArchPageTable ArchPageTable; - #endif // __POWER_PROCESS_HH__ diff --git a/src/arch/riscv/process.cc b/src/arch/riscv/process.cc index b4fe1eefc..88a093a06 100644 --- a/src/arch/riscv/process.cc +++ b/src/arch/riscv/process.cc @@ -59,9 +59,10 @@ using namespace std; using namespace RiscvISA; -RiscvProcess::RiscvProcess(ProcessParams * params, - ObjectFile *objFile) : Process(params, objFile) +RiscvProcess::RiscvProcess(ProcessParams *params, ObjectFile *objFile) : + Process(params, new FuncPageTable(params->name, params->pid), objFile) { + fatal_if(!params->useArchPT, "Arch page tables not implemented."); const Addr stack_base = 0x7FFFFFFFFFFFFFFFL; const Addr max_stack_size = 8 * 1024 * 1024; const Addr next_thread_stack_base = stack_base - max_stack_size; diff --git a/src/arch/riscv/process.hh b/src/arch/riscv/process.hh index 2a27f350e..bda278ec4 100644 --- a/src/arch/riscv/process.hh +++ b/src/arch/riscv/process.hh @@ -65,8 +65,4 @@ class RiscvProcess : public Process virtual bool mmapGrowsDown() const override { return false; } }; -/* No architectural page table defined for this ISA */ -typedef NoArchPageTable ArchPageTable; - - #endif // __RISCV_PROCESS_HH__ diff --git a/src/arch/sparc/process.cc b/src/arch/sparc/process.cc index da7032f08..fe91589d0 100644 --- a/src/arch/sparc/process.cc +++ b/src/arch/sparc/process.cc @@ -42,6 +42,7 @@ #include "cpu/thread_context.hh" #include "debug/Stack.hh" #include "mem/page_table.hh" +#include "params/Process.hh" #include "sim/aux_vector.hh" #include "sim/process_impl.hh" #include "sim/syscall_return.hh" @@ -53,10 +54,12 @@ using namespace SparcISA; static const int FirstArgumentReg = 8; -SparcProcess::SparcProcess(ProcessParams * params, ObjectFile *objFile, +SparcProcess::SparcProcess(ProcessParams *params, ObjectFile *objFile, Addr _StackBias) - : Process(params, objFile), StackBias(_StackBias) + : Process(params, new FuncPageTable(params->name, params->pid), objFile), + StackBias(_StackBias) { + fatal_if(!params->useArchPT, "Arch page tables not implemented."); // Initialize these to 0s fillStart = 0; spillStart = 0; diff --git a/src/arch/sparc/process.hh b/src/arch/sparc/process.hh index 6a203a400..d7e096758 100644 --- a/src/arch/sparc/process.hh +++ b/src/arch/sparc/process.hh @@ -160,7 +160,4 @@ class Sparc64Process : public SparcProcess void setSyscallArg(ThreadContext *tc, int i, SparcISA::IntReg val); }; -/* No architectural page table defined for this ISA */ -typedef NoArchPageTable ArchPageTable; - #endif // __SPARC_PROCESS_HH__ diff --git a/src/arch/x86/process.cc b/src/arch/x86/process.cc index 1ad1315da..f11cc3438 100644 --- a/src/arch/x86/process.cc +++ b/src/arch/x86/process.cc @@ -60,6 +60,7 @@ #include "debug/Stack.hh" #include "mem/multi_level_page_table.hh" #include "mem/page_table.hh" +#include "params/Process.hh" #include "sim/aux_vector.hh" #include "sim/process_impl.hh" #include "sim/syscall_desc.hh" @@ -95,10 +96,16 @@ static const int ArgumentReg32[] = { static const int NumArgumentRegs32 M5_VAR_USED = sizeof(ArgumentReg) / sizeof(const int); -X86Process::X86Process(ProcessParams * params, ObjectFile *objFile, +X86Process::X86Process(ProcessParams *params, ObjectFile *objFile, SyscallDesc *_syscallDescs, int _numSyscallDescs) - : Process(params, objFile), syscallDescs(_syscallDescs), - numSyscallDescs(_numSyscallDescs) + : Process(params, params->useArchPT ? + static_cast( + new ArchPageTable(params->name, params->pid, + params->system)) : + static_cast( + new FuncPageTable(params->name, params->pid)), + objFile), + syscallDescs(_syscallDescs), numSyscallDescs(_numSyscallDescs) { } diff --git a/src/arch/x86/process.hh b/src/arch/x86/process.hh index 3eb9620c9..e5e18570d 100644 --- a/src/arch/x86/process.hh +++ b/src/arch/x86/process.hh @@ -59,6 +59,14 @@ namespace X86ISA class X86Process : public Process { protected: + /** + * Declaration of architectural page table for x86. + * + * These page tables are stored in system memory and respect x86 + * specification. + */ + typedef MultiLevelPageTable ArchPageTable; + Addr _gdtStart; Addr _gdtSize; @@ -189,14 +197,6 @@ namespace X86ISA Process *process, TheISA::IntReg flags) override; }; - /** - * Declaration of architectural page table for x86. - * - * These page tables are stored in system memory and respect x86 - * specification. - */ - typedef MultiLevelPageTable ArchPageTable; - } #endif // __ARCH_X86_PROCESS_HH__ diff --git a/src/mem/page_table.hh b/src/mem/page_table.hh index 0d0a75ef5..883b47cdc 100644 --- a/src/mem/page_table.hh +++ b/src/mem/page_table.hh @@ -246,19 +246,4 @@ class FuncPageTable : public PageTableBase void getMappings(std::vector> *addr_maps) override; }; -/** - * Faux page table class indended to stop the usage of - * an architectural page table, when there is none defined - * for a particular ISA. - */ -class NoArchPageTable : public FuncPageTable -{ - public: - NoArchPageTable(const std::string &__name, uint64_t _pid, System *_sys, - Addr _pageSize = TheISA::PageBytes) : FuncPageTable(__name, _pid) - { - fatal("No architectural page table defined for this ISA.\n"); - } -}; - #endif // __MEM_PAGE_TABLE_HH__ diff --git a/src/sim/process.cc b/src/sim/process.cc index ee90667ff..77d7903a7 100644 --- a/src/sim/process.cc +++ b/src/sim/process.cc @@ -101,14 +101,12 @@ using namespace std; using namespace TheISA; -Process::Process(ProcessParams * params, ObjectFile * obj_file) +Process::Process(ProcessParams *params, PageTableBase *pTable, + ObjectFile *obj_file) : SimObject(params), system(params->system), useArchPT(params->useArchPT), kvmInSE(params->kvmInSE), - pTable(useArchPT ? - static_cast(new ArchPageTable(name(), params->pid, - system)) : - static_cast(new FuncPageTable(name(), params->pid))), + pTable(pTable), initVirtMem(system->getSystemPort(), this, SETranslatingPortProxy::Always), objFile(obj_file), diff --git a/src/sim/process.hh b/src/sim/process.hh index e4a52e3de..6d465aca9 100644 --- a/src/sim/process.hh +++ b/src/sim/process.hh @@ -63,7 +63,8 @@ class ThreadContext; class Process : public SimObject { public: - Process(ProcessParams *params, ObjectFile *obj_file); + Process(ProcessParams *params, PageTableBase *pTable, + ObjectFile *obj_file); void serialize(CheckpointOut &cp) const override; void unserialize(CheckpointIn &cp) override;