From: Gabe Black <gblack@eecs.umich.edu>
Date: Thu, 19 Oct 2006 00:53:59 +0000 (-0400)
Subject: Zeroed out the actual LSB in addition to moving it's original value the MSB.
X-Git-Tag: m5_2.0_beta2~85
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=54c9701a257656cf07d1f2ca93f5c5d558f878f9;p=gem5.git

Zeroed out the actual LSB in addition to moving it's original value the MSB.

--HG--
extra : convert_revision : d29efe01781d72ee6e61818e7b93972262c0616b
---

diff --git a/src/arch/sparc/isa/operands.isa b/src/arch/sparc/isa/operands.isa
index 9dcd73598..40926a5fb 100644
--- a/src/arch/sparc/isa/operands.isa
+++ b/src/arch/sparc/isa/operands.isa
@@ -48,7 +48,7 @@ output header {{
     // MSB put in the LSB position but are otherwise normal.
     static inline unsigned int dfpr(unsigned int regNum)
     {
-        return regNum | ((regNum & 1) << 5);
+        return (regNum & (~1)) | ((regNum & 1) << 5);
     }
 }};