From: Andreas Krebbel Date: Fri, 6 Apr 2018 07:46:30 +0000 (+0000) Subject: IBM Z: Fix vcond-shift testcase. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=54ebcca7952144986748e819751cce0c6ebba2d2;p=gcc.git IBM Z: Fix vcond-shift testcase. gcc/testsuite/ChangeLog: 2018-04-06 Andreas Krebbel * gcc.target/s390/vector/vcond-shift.c: Use the proper conditions to trigger the optimization. Do some cleanup and function renaming. Add more test functions. From-SVN: r259165 --- diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 9755321e3c1..cafaae99408 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,9 @@ +2018-04-06 Andreas Krebbel + + * gcc.target/s390/vector/vcond-shift.c: Use the proper conditions + to trigger the optimization. Do some cleanup and function + renaming. Add more test functions. + 2018-04-06 Andreas Krebbel * gcc.target/s390/s390.exp: Remove -O0 from list of torture diff --git a/gcc/testsuite/gcc.target/s390/vector/vcond-shift.c b/gcc/testsuite/gcc.target/s390/vector/vcond-shift.c index cc40153bb27..a6b4e97aa50 100644 --- a/gcc/testsuite/gcc.target/s390/vector/vcond-shift.c +++ b/gcc/testsuite/gcc.target/s390/vector/vcond-shift.c @@ -3,71 +3,174 @@ /* { dg-do compile { target { s390*-*-* } } } */ /* { dg-options "-O3 -march=z13 -mzarch" } */ -/* { dg-final { scan-assembler "vesraf\t%v.?,%v.?,31" } } */ -/* { dg-final { scan-assembler "vesrah\t%v.?,%v.?,15" } } */ -/* { dg-final { scan-assembler "vesrab\t%v.?,%v.?,7" } } */ +/* { dg-final { scan-assembler-times "vesraf\t%v.?,%v.?,31" 6 } } */ +/* { dg-final { scan-assembler-times "vesrah\t%v.?,%v.?,15" 6 } } */ +/* { dg-final { scan-assembler-times "vesrab\t%v.?,%v.?,7" 6 } } */ /* { dg-final { scan-assembler-not "vzero\t*" } } */ -/* { dg-final { scan-assembler "vesrlf\t%v.?,%v.?,31" } } */ -/* { dg-final { scan-assembler "vesrlh\t%v.?,%v.?,15" } } */ -/* { dg-final { scan-assembler "vesrlb\t%v.?,%v.?,7" } } */ +/* { dg-final { scan-assembler-times "vesrlf\t%v.?,%v.?,31" 4 } } */ +/* { dg-final { scan-assembler-times "vesrlh\t%v.?,%v.?,15" 4 } } */ +/* { dg-final { scan-assembler-times "vesrlb\t%v.?,%v.?,7" 4 } } */ -#define SZ 8 -#define SZ2 16 -#define SZ3 32 +/* Make it expand to two vector operations. */ +#define ITER(X) (2 * (16 / sizeof (X[1]))) -void foo(int *w) +void +vesraf_div (int *x) { int i; - int *ww = __builtin_assume_aligned (w, 8); + int *xx = __builtin_assume_aligned (x, 8); - /* Should expand to (ww + (ww < 0 ? 1 : 0)) >> 1 - which in turn should get simplified to (ww + (ww >> 31)) >> 1. */ - for (i = 0; i < SZ; i++) - ww[i] = ww[i] / 2; + /* Should expand to (xx + (xx < 0 ? 1 : 0)) >> 1 + which in turn should get simplified to (xx + (xx >> 31)) >> 1. */ + for (i = 0; i < ITER (xx); i++) + xx[i] = xx[i] / 2; } -void foo2(short *w) +void +vesrah_div (short *x) { int i; - short *ww = __builtin_assume_aligned (w, 8); + short *xx = __builtin_assume_aligned (x, 8); - for (i = 0; i < SZ2; i++) - ww[i] = ww[i] / 2; + for (i = 0; i < ITER (xx); i++) + xx[i] = xx[i] / 2; } -void foo3(signed char *w) +void +vesrab_div (signed char *x) { int i; - signed char *ww = __builtin_assume_aligned (w, 8); + signed char *xx = __builtin_assume_aligned (x, 8); - for (i = 0; i < SZ3; i++) - ww[i] = ww[i] / 2; + for (i = 0; i < ITER (xx); i++) + xx[i] = xx[i] / 2; } -int baz(int *x) + + +int +vesraf_lt (int *x) { int i; int *xx = __builtin_assume_aligned (x, 8); - for (i = 0; i < SZ; i++) + for (i = 0; i < ITER (xx); i++) xx[i] = xx[i] < 0 ? -1 : 0; } -int baf(short *x) +int +vesrah_lt (short *x) { int i; short *xx = __builtin_assume_aligned (x, 8); - for (i = 0; i < SZ2; i++) - xx[i] = xx[i] >= 0 ? 0 : 1; + for (i = 0; i < ITER (xx); i++) + xx[i] = xx[i] < 0 ? -1 : 0; } -int bal(signed char *x) +int +vesrab_lt (signed char *x) { int i; signed char *xx = __builtin_assume_aligned (x, 8); - for (i = 0; i < SZ3; i++) + for (i = 0; i < ITER (xx); i++) + xx[i] = xx[i] < 0 ? -1 : 0; +} + + + +int +vesraf_ge (int *x) +{ + int i; + int *xx = __builtin_assume_aligned (x, 8); + + for (i = 0; i < ITER (xx); i++) xx[i] = xx[i] >= 0 ? 0 : -1; } + +int +vesrah_ge (short *x) +{ + int i; + short *xx = __builtin_assume_aligned (x, 8); + + for (i = 0; i < ITER (xx); i++) + xx[i] = xx[i] >= 0 ? 0 : -1; +} + +int +vesrab_ge (signed char *x) +{ + int i; + signed char *xx = __builtin_assume_aligned (x, 8); + + for (i = 0; i < ITER (xx); i++) + xx[i] = xx[i] >= 0 ? 0 : -1; +} + + + +int +vesrlf_lt (int *x) +{ + int i; + int *xx = __builtin_assume_aligned (x, 8); + + for (i = 0; i < ITER (xx); i++) + xx[i] = xx[i] < 0 ? 1 : 0; +} + +int +vesrlh_lt (short *x) +{ + int i; + short *xx = __builtin_assume_aligned (x, 8); + + for (i = 0; i < ITER (xx); i++) + xx[i] = xx[i] < 0 ? 1 : 0; +} + +int +vesrlb_lt (signed char *x) +{ + int i; + signed char *xx = __builtin_assume_aligned (x, 8); + + for (i = 0; i < ITER (xx); i++) + xx[i] = xx[i] < 0 ? 1 : 0; +} + + + +int +vesrlf_ge (int *x) +{ + int i; + int *xx = __builtin_assume_aligned (x, 8); + + for (i = 0; i < ITER (xx); i++) + xx[i] = xx[i] >= 0 ? 0 : 1; +} + +int +vesrlh_ge (short *x) +{ + int i; + short *xx = __builtin_assume_aligned (x, 8); + + for (i = 0; i < ITER (xx); i++) + xx[i] = xx[i] >= 0 ? 0 : 1; +} + +int +vesrlb_ge (signed char *x) +{ + int i; + signed char *xx = __builtin_assume_aligned (x, 8); + + for (i = 0; i < ITER (xx); i++) + xx[i] = xx[i] >= 0 ? 0 : 1; +}