From: Nick Clifton Date: Tue, 30 Jun 2015 10:25:18 +0000 (+0100) Subject: Add support for SADDR addressing to the RL78 port. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=54f66250d79ec304ea427915bfd8b535ec249c3b;p=binutils-gdb.git Add support for SADDR addressing to the RL78 port. gas * config/rl78-parse.y: Tag all saddr expressions throughout. (SET_SA): New. (expr_is_saddr): Allow symbolic expressions. * config/tc-rl78.c (md_apply_fix): Handle SADDR. bfd * elf32-rl78.c (rl78_elf_howto_table): Add RH_SADDR. (rl78_reloc_map): Add R_RL78_RH_SADDR. * reloc.c: Add BFD_RELOC_RL78_SADDR. * libbfd.h: Regenerate. * bfd-in2.h: Regenerate. --- diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h index 35e9d77f347..ce964bb355c 100644 --- a/bfd/bfd-in2.h +++ b/bfd/bfd-in2.h @@ -4584,6 +4584,7 @@ number for the SBIC, SBIS, SBI and CBI instructions */ BFD_RELOC_RL78_HI8, BFD_RELOC_RL78_LO16, BFD_RELOC_RL78_CODE, + BFD_RELOC_RL78_SADDR, /* Renesas RX Relocations. */ BFD_RELOC_RX_NEG8, diff --git a/bfd/elf32-rl78.c b/bfd/elf32-rl78.c index ff3af7b3362..add3336ee7b 100644 --- a/bfd/elf32-rl78.c +++ b/bfd/elf32-rl78.c @@ -95,7 +95,7 @@ static reloc_howto_type rl78_elf_howto_table [] = RL78REL (RH_RELAX, 0, 0, 0, dont, FALSE), EMPTY_HOWTO (0x2e), - EMPTY_HOWTO (0x2f), + RL78REL (RH_SADDR, 0, 0, 0, dont, FALSE), EMPTY_HOWTO (0x30), EMPTY_HOWTO (0x31), EMPTY_HOWTO (0x32), @@ -242,6 +242,7 @@ static const struct rl78_reloc_map rl78_reloc_map [] = { BFD_RELOC_RL78_ABS16UL, R_RL78_ABS16UL }, { BFD_RELOC_RL78_ABS16UW, R_RL78_ABS16UW }, { BFD_RELOC_RL78_ABS16U, R_RL78_ABS16U }, + { BFD_RELOC_RL78_SADDR, R_RL78_RH_SADDR }, { BFD_RELOC_RL78_RELAX, R_RL78_RH_RELAX } }; diff --git a/bfd/libbfd.h b/bfd/libbfd.h index 711f08f60b4..cc195523fc3 100644 --- a/bfd/libbfd.h +++ b/bfd/libbfd.h @@ -2114,6 +2114,7 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@", "BFD_RELOC_RL78_HI8", "BFD_RELOC_RL78_LO16", "BFD_RELOC_RL78_CODE", + "BFD_RELOC_RL78_SADDR", "BFD_RELOC_RX_NEG8", "BFD_RELOC_RX_NEG16", "BFD_RELOC_RX_NEG24", diff --git a/bfd/reloc.c b/bfd/reloc.c index d312e48bc13..9a0687815d7 100644 --- a/bfd/reloc.c +++ b/bfd/reloc.c @@ -4956,6 +4956,8 @@ ENUMX BFD_RELOC_RL78_LO16 ENUMX BFD_RELOC_RL78_CODE +ENUMX + BFD_RELOC_RL78_SADDR ENUMDOC Renesas RL78 Relocations. diff --git a/gas/config/rl78-parse.y b/gas/config/rl78-parse.y index e9441d5c1cc..f34903e6b65 100644 --- a/gas/config/rl78-parse.y +++ b/gas/config/rl78-parse.y @@ -96,6 +96,8 @@ static int rl78_bit_insn = 0; #define NOT_SADDR rl78_error ("Expression not 0xFFE20 to 0xFFF1F") #define SA(e) if (!expr_is_saddr (e)) NOT_SADDR; +#define SET_SA(e) e.X_md = BFD_RELOC_RL78_SADDR + #define NOT_SFR rl78_error ("Expression not 0xFFF00 to 0xFFFFF") #define SFR(e) if (!expr_is_sfr (e)) NOT_SFR; @@ -207,7 +209,7 @@ statement : { B1 (0x0c|$1); O1 ($5); } | addsub EXPR {SA($2)} ',' '#' EXPR - { B1 (0x0a|$1); O1 ($2); O1 ($6); } + { B1 (0x0a|$1); SET_SA ($2); O1 ($2); O1 ($6); } | addsub A ',' A { B2 (0x61, 0x01|$1); } @@ -219,7 +221,7 @@ statement : { B2 (0x61, 0x00|$1); F ($2, 13, 3); } | addsub A ',' EXPR {SA($4)} - { B1 (0x0b|$1); O1 ($4); } + { B1 (0x0b|$1); SET_SA ($4); O1 ($4); } | addsub A ',' opt_es '!' EXPR { B1 (0x0f|$1); O2 ($6); rl78_linkrelax_addr16 (); } @@ -236,8 +238,6 @@ statement : | addsub A ',' opt_es '[' HL '+' C ']' { B2 (0x61, 0x82|$1); } - - | addsub opt_es '!' EXPR ',' '#' EXPR { if ($1 != 0x40) { rl78_error ("Only CMP takes these operands"); } @@ -254,7 +254,7 @@ statement : { B1 (0x01|$1); F ($4, 5, 2); } | addsubw AX ',' EXPR {SA($4)} - { B1 (0x06|$1); O1 ($4); } + { B1 (0x06|$1); SET_SA ($4); O1 ($4); } | addsubw AX ',' opt_es '!' EXPR { B1 (0x02|$1); O2 ($6); rl78_linkrelax_addr16 (); } @@ -280,7 +280,7 @@ statement : { if (expr_is_sfr ($4)) { B2 (0x71, 0x08|$1); FE ($6, 9, 3); O1 ($4); } else if (expr_is_saddr ($4)) - { B2 (0x71, 0x00|$1); FE ($6, 9, 3); O1 ($4); } + { B2 (0x71, 0x00|$1); FE ($6, 9, 3); SET_SA ($4); O1 ($4); } else NOT_SFR_OR_SADDR; } @@ -320,7 +320,7 @@ statement : { if (expr_is_sfr ($2)) { B2 (0x31, 0x80|$1); FE ($4, 9, 3); O1 ($2); PC1 ($7); } else if (expr_is_saddr ($2)) - { B2 (0x31, 0x00|$1); FE ($4, 9, 3); O1 ($2); PC1 ($7); } + { B2 (0x31, 0x00|$1); FE ($4, 9, 3); SET_SA ($2); O1 ($2); PC1 ($7); } else NOT_SFR_OR_SADDR; } @@ -401,7 +401,7 @@ statement : { if (expr_is_sfr ($2)) { B2 (0x71, 0x0a|$1); FE ($4, 9, 3); O1 ($2); } else if (expr_is_saddr ($2)) - { B2 (0x71, 0x02|$1); FE ($4, 9, 3); O1 ($2); } + { B2 (0x71, 0x02|$1); FE ($4, 9, 3); SET_SA ($2); O1 ($2); } else NOT_SFR_OR_SADDR; } @@ -427,7 +427,7 @@ statement : { B1 (0xe2|$1); } | oneclrb EXPR {SA($2)} - { B1 (0xe4|$1); O1 ($2); } + { B1 (0xe4|$1); SET_SA ($2); O1 ($2); } | oneclrb opt_es '!' EXPR { B1 (0xe5|$1); O2 ($4); rl78_linkrelax_addr16 (); } @@ -454,7 +454,7 @@ statement : { B1 (0xd2); } | CMP0 EXPR {SA($2)} - { B1 (0xd4); O1 ($2); } + { B1 (0xd4); SET_SA ($2); O1 ($2); } | CMP0 opt_es '!' EXPR { B1 (0xd5); O2 ($4); rl78_linkrelax_addr16 (); } @@ -470,7 +470,7 @@ statement : { B1 (0x80|$1); F ($2, 5, 3); } | incdec EXPR {SA($2)} - { B1 (0xa4|$1); O1 ($2); } + { B1 (0xa4|$1); SET_SA ($2); O1 ($2); } | incdec '!' EXPR { B1 (0xa0|$1); O2 ($3); rl78_linkrelax_addr16 (); } | incdec ES ':' '!' EXPR @@ -486,7 +486,7 @@ statement : { B1 (0xa1|$1); F ($2, 5, 2); } | incdecw EXPR {SA($2)} - { B1 (0xa6|$1); O1 ($2); } + { B1 (0xa6|$1); SET_SA ($2); O1 ($2); } | incdecw opt_es '!' EXPR { B1 (0xa2|$1); O2 ($4); rl78_linkrelax_addr16 (); } @@ -556,7 +556,7 @@ statement : { if (expr_is_sfr ($3)) { B1 (0xce); O1 ($3); O1 ($6); } else if (expr_is_saddr ($3)) - { B1 (0xcd); O1 ($3); O1 ($6); } + { B1 (0xcd); SET_SA ($3); O1 ($3); O1 ($6); } else NOT_SFR_OR_SADDR; } @@ -577,7 +577,7 @@ statement : { if (expr_is_sfr ($3)) { B1 (0x9e); O1 ($3); } else if (expr_is_saddr ($3)) - { B1 (0x9d); O1 ($3); } + { B1 (0x9d); SET_SA ($3); O1 ($3); } else NOT_SFR_OR_SADDR; } @@ -596,7 +596,7 @@ statement : | MOV A ',' opt_es EXPR {NOT_ES} { if (expr_is_saddr ($5)) - { B1 (0x8d); O1 ($5); } + { B1 (0x8d); SET_SA ($5); O1 ($5); } else if (expr_is_sfr ($5)) { B1 (0x8e); O1 ($5); } else @@ -604,7 +604,7 @@ statement : } | MOV regb_na ',' opt_es EXPR {SA($5)} {NOT_ES} - { B1 (0xc8|reg_xbc($2)); O1 ($5); } + { B1 (0xc8|reg_xbc($2)); SET_SA ($5); O1 ($5); } | MOV A ',' sfr { B2 (0x8e, $4); } @@ -620,7 +620,7 @@ statement : { if ($2 != 0xfd) rl78_error ("Only ES allowed here"); else - { B2 (0x61, 0xb8); O1 ($5); } + { B2 (0x61, 0xb8); SET_SA ($5); O1 ($5); } } | MOV A ',' opt_es '[' DE ']' @@ -723,7 +723,7 @@ statement : | mov1 CY ',' EXPR '.' EXPR { if (expr_is_saddr ($4)) - { B2 (0x71, 0x04); FE ($6, 9, 3); O1 ($4); } + { B2 (0x71, 0x04); FE ($6, 9, 3); SET_SA ($4); O1 ($4); } else if (expr_is_sfr ($4)) { B2 (0x71, 0x0c); FE ($6, 9, 3); O1 ($4); } else @@ -741,7 +741,7 @@ statement : | mov1 EXPR '.' EXPR ',' CY { if (expr_is_saddr ($2)) - { B2 (0x71, 0x01); FE ($4, 9, 3); O1 ($2); } + { B2 (0x71, 0x01); FE ($4, 9, 3); SET_SA ($2); O1 ($2); } else if (expr_is_sfr ($2)) { B2 (0x71, 0x09); FE ($4, 9, 3); O1 ($2); } else @@ -772,7 +772,7 @@ statement : | MOVW opt_es EXPR ',' '#' EXPR {NOT_ES} { if (expr_is_saddr ($3)) - { B1 (0xc9); O1 ($3); O2 ($6); } + { B1 (0xc9); SET_SA ($3); O1 ($3); O2 ($6); } else if (expr_is_sfr ($3)) { B1 (0xcb); O1 ($3); O2 ($6); } else @@ -781,7 +781,7 @@ statement : | MOVW AX ',' opt_es EXPR {NOT_ES} { if (expr_is_saddr ($5)) - { B1 (0xad); O1 ($5); WA($5); } + { B1 (0xad); SET_SA ($5); O1 ($5); WA($5); } else if (expr_is_sfr ($5)) { B1 (0xae); O1 ($5); WA($5); } else @@ -790,7 +790,7 @@ statement : | MOVW opt_es EXPR ',' AX {NOT_ES} { if (expr_is_saddr ($3)) - { B1 (0xbd); O1 ($3); WA($3); } + { B1 (0xbd); SET_SA ($3); O1 ($3); WA($3); } else if (expr_is_sfr ($3)) { B1 (0xbe); O1 ($3); WA($3); } else @@ -870,7 +870,7 @@ statement : { B2 (0xb8, 0); } | MOVW regw_na ',' EXPR {SA($4)} - { B1 (0xca); F ($2, 2, 2); O1 ($4); WA($4); } + { B1 (0xca); F ($2, 2, 2); SET_SA ($4); O1 ($4); WA($4); } | MOVW regw_na ',' opt_es '!' EXPR { B1 (0xcb); F ($2, 2, 2); O2 ($6); WA($6); rl78_linkrelax_addr16 (); } @@ -1078,7 +1078,7 @@ statement : { if (expr_is_sfr ($4)) { B2 (0x61, 0xab); O1 ($4); } else if (expr_is_saddr ($4)) - { B2 (0x61, 0xa8); O1 ($4); } + { B2 (0x61, 0xa8); SET_SA ($4); O1 ($4); } else NOT_SFR_OR_SADDR; } @@ -1531,7 +1531,7 @@ expr_is_saddr (expressionS exp) unsigned long v; if (exp.X_op != O_constant) - return 0; + return 1; v = exp.X_add_number; if (0xFFE20 <= v && v <= 0xFFF1F) @@ -1598,5 +1598,3 @@ check_expr_is_const (expressionS e, int vmin, int vmax) } return 1; } - - diff --git a/gas/config/tc-rl78.c b/gas/config/tc-rl78.c index 3c3f78c0218..3a14fc08768 100644 --- a/gas/config/tc-rl78.c +++ b/gas/config/tc-rl78.c @@ -1024,12 +1024,12 @@ md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED, /* We used a new frag for this opcode, so the opcode address should be the frag address. */ mypc = fragP->fr_address + (fragP->fr_opcode - fragP->fr_literal); - tprintf("\033[32mmypc: 0x%x\033[0m\n", (int)mypc); + tprintf ("\033[32mmypc: 0x%x\033[0m\n", (int)mypc); /* Try to get the target address. If we fail here, we just use the largest format. */ if (rl78_frag_fix_value (fragP, segment, 0, & addr0, - fragP->tc_frag_data->relax[ri].type != RL78_RELAX_BRANCH, 0)) + fragP->tc_frag_data->relax[ri].type != RL78_RELAX_BRANCH, 0)) { /* We don't know the target address. */ keep_reloc = 1; @@ -1387,6 +1387,7 @@ md_apply_fix (struct fix * f ATTRIBUTE_UNUSED, val); /* Fall through. */ case BFD_RELOC_8: + case BFD_RELOC_RL78_SADDR: /* We need to store the 8 LSB, but this works. */ op[0] = val; break;