From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Mon, 22 Jul 2019 11:19:58 +0000 (+0100)
Subject: experimenting
X-Git-Tag: ls180-24jan2020~770
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=550cb5416f4bbf7c21bd2a163043d0391034dd2e;p=ieee754fpu.git

experimenting
---

diff --git a/src/ieee754/fpcommon/test/fpmux.py b/src/ieee754/fpcommon/test/fpmux.py
index 181e57a2..631f2fc2 100644
--- a/src/ieee754/fpcommon/test/fpmux.py
+++ b/src/ieee754/fpcommon/test/fpmux.py
@@ -167,6 +167,9 @@ def create_random(num_rows, width, single_op=False, n_vals=10):
             else:
                 op1 = randint(0, (1<<width)-1)
                 op2 = randint(0, (1<<width)-1)
+
+                op1 = 0x4000
+                op2 = 0x4000
                 vals.append((op1, op2,))
     return vals
 
diff --git a/src/ieee754/fpdiv/div0.py b/src/ieee754/fpdiv/div0.py
index 4bd12cb2..763d0be6 100644
--- a/src/ieee754/fpdiv/div0.py
+++ b/src/ieee754/fpdiv/div0.py
@@ -66,7 +66,9 @@ class FPDivStage0Mod(Elaboratable):
             bm0 = Signal(len(self.i.b.m)+3, reset_less=True)
             m.d.comb += [
                          am0.eq(Cat(0, 0, self.i.a.m, 0)),
-                         bm0.eq(Cat(0, 0, self.i.b.m, 0))
+                         bm0.eq(Cat(0, 0, self.i.b.m, 0)),
+                         #am0.eq(0x392),
+                         #bm0.eq(0x1110),
                         ]
 
             m.d.comb += [self.o.z.e.eq(self.i.a.e - self.i.b.e + 1),
diff --git a/src/ieee754/fpdiv/div2.py b/src/ieee754/fpdiv/div2.py
index 61c7fa4c..8fb5b8c2 100644
--- a/src/ieee754/fpdiv/div2.py
+++ b/src/ieee754/fpdiv/div2.py
@@ -65,24 +65,26 @@ class FPDivStage2Mod(FPState, Elaboratable):
         with m.If(~self.i.out_do_z):
             mw = self.o.z.m_width
             # TODO: compensate for answer being in range 0.49999 to 1.99998
-            p = Signal(len(self.i.quotient_root), reset_less=True)
+            pl = len(self.i.quotient_root) + len(self.i.remainder)
+            pt = Signal(pl, reset_less=True)
+            m.d.comb += pt.eq(Cat(self.i.remainder, self.i.quotient_root))
+            p = Signal(pl, reset_less=True)
             with m.If(self.i.quotient_root[-1]):
-                m.d.comb += p.eq(self.i.quotient_root)
+                m.d.comb += p.eq(pt)
             with m.Else():
                 # get 1 bit of extra accuracy if the mantissa top bit is zero
-                m.d.comb += p.eq(self.i.quotient_root<<1)
+                m.d.comb += p.eq(pt << 1)
                 m.d.comb += self.o.z.e.eq(self.i.z.e-1)
 
             # TODO: use p here instead of quotient_root, direct.
             # XXX what to do about remainder? shift that as well?
             # hmm, how about concatenate remainder and quotient...
             m.d.comb += [
-                self.o.z.m.eq(self.i.quotient_root[mw+2:]),
-                self.o.of.m0.eq(self.i.quotient_root[mw+2]), # copy of LSB
-                self.o.of.guard.eq(self.i.quotient_root[mw+1]),
-                self.o.of.round_bit.eq(self.i.quotient_root[mw]),
-                self.o.of.sticky.eq(Cat(self.i.remainder,
-                                        self.i.quotient_root[:mw]).bool())
+                self.o.z.m.eq(p[-mw-2:]),
+                self.o.of.m0.eq(p[-mw-2]), # copy of LSB
+                self.o.of.guard.eq(p[-mw-1]),
+                self.o.of.round_bit.eq(p[-mw]),
+                self.o.of.sticky.eq(p[:-mw].bool())
             ]
 
         m.d.comb += self.o.out_do_z.eq(self.i.out_do_z)