From: Eddie Hung <eddieh@ece.ubc.ca>
Date: Thu, 21 Mar 2019 17:20:27 +0000 (-0700)
Subject: Opt
X-Git-Tag: yosys-0.9~171^2~41
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=5597270b9e2331d8836c8c24a073aadc1e19584a;p=yosys.git

Opt
---

diff --git a/passes/techmap/shregmap.cc b/passes/techmap/shregmap.cc
index 028f4ba35..d5221d46f 100644
--- a/passes/techmap/shregmap.cc
+++ b/passes/techmap/shregmap.cc
@@ -102,7 +102,7 @@ struct ShregmapTechXilinx7 : ShregmapTech
 
 	virtual void init(const Module* module, const SigMap &sigmap) override
 	{
-		for (auto i : module->cells_) {
+		for (const auto &i : module->cells_) {
 			auto cell = i.second;
 			if (cell->type != "$shiftx") continue;
 			if (cell->getParam("\\Y_WIDTH") != 1) continue;