From: Michael Snyder Date: Fri, 18 Jul 2003 00:10:41 +0000 (+0000) Subject: 2003-07-17 Michael Snyder X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=55acb21b1fb8e65c8b2f713e9414f3b4a06498a4;p=binutils-gdb.git 2003-07-17 Michael Snyder * compile.c (sim_resume): Handle shll reg, reg and shlr reg, reg. --- diff --git a/sim/h8300/ChangeLog b/sim/h8300/ChangeLog index 77cb91260dd..2436abac266 100644 --- a/sim/h8300/ChangeLog +++ b/sim/h8300/ChangeLog @@ -1,6 +1,8 @@ 2003-07-17 Michael Snyder - * compile.c (decode): IMM16 is always zero-extended. + * compile.c (sim_resume): Handle shll reg, reg and shlr reg, reg. + (decode): IMM16 is always zero-extended. + 2003-06-24 Michael Snyder diff --git a/sim/h8300/compile.c b/sim/h8300/compile.c index 3819fdd6929..e25b3f7c6fe 100644 --- a/sim/h8300/compile.c +++ b/sim/h8300/compile.c @@ -3153,10 +3153,10 @@ sim_resume (SIM_DESC sd, int step, int siggnal) if (fetch2 (sd, &code->dst, &rd)) goto end; - if (code->src.type == X (OP_IMM, SB)) + if (memcmp (&code->src, &code->dst, sizeof (code->src)) == 0) + ea = 1; /* unary op */ + else /* binary op */ fetch (sd, &code->src, &ea); - else - ea = 1; if (code->opcode == O (O_SHLL, SB)) { @@ -3177,10 +3177,10 @@ sim_resume (SIM_DESC sd, int step, int siggnal) if (fetch2 (sd, &code->dst, &rd)) goto end; - if (code->src.type == X (OP_IMM, SW)) - fetch (sd, &code->src, &ea); + if (memcmp (&code->src, &code->dst, sizeof (code->src)) == 0) + ea = 1; /* unary op */ else - ea = 1; + fetch (sd, &code->src, &ea); if (code->opcode == O (O_SHLL, SW)) { @@ -3201,10 +3201,10 @@ sim_resume (SIM_DESC sd, int step, int siggnal) if (fetch2 (sd, &code->dst, &rd)) goto end; - if (code->src.type == X (OP_IMM, SL)) - fetch (sd, &code->src, &ea); + if (memcmp (&code->src, &code->dst, sizeof (code->src)) == 0) + ea = 1; /* unary op */ else - ea = 1; + fetch (sd, &code->src, &ea); if (code->opcode == O (O_SHLL, SL)) {