From: Dmitry Selyutin <ghostmansd@gmail.com>
Date: Mon, 5 Sep 2022 19:29:09 +0000 (+0300)
Subject: power_insn: clean extra disassembly
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=55e1900f558ba8df8a18d6175c7cdec8651194e4;p=openpower-isa.git

power_insn: clean extra disassembly
---

diff --git a/src/openpower/decoder/power_insn.py b/src/openpower/decoder/power_insn.py
index e9a51625..568542fb 100644
--- a/src/openpower/decoder/power_insn.py
+++ b/src/openpower/decoder/power_insn.py
@@ -610,7 +610,12 @@ class DynamicOperandGPR(DynamicOperandReg):
             yield f"{int(value):0{value.bits}b}"
             yield repr(span)
             if svp64:
-                yield repr(self.extra_idx(record))
+                extra_idx = self.extra_idx(record)
+                if record.etype is _SVEtype.NONE:
+                    yield f"extra[none]"
+                else:
+                    etype = repr(record.etype).lower()
+                    yield f"{etype}{extra_idx!r}"
         else:
             yield f"r{str(int(value))}"
 
@@ -625,7 +630,12 @@ class DynamicOperandFPR(DynamicOperandReg):
             yield f"{int(value):0{value.bits}b}"
             yield repr(span)
             if svp64:
-                yield repr(self.extra_idx(record))
+                extra_idx = self.extra_idx(record)
+                if record.etype is _SVEtype.NONE:
+                    yield f"extra[none]"
+                else:
+                    etype = repr(record.etype).lower()
+                    yield f"{etype}{extra_idx!r}"
         else:
             yield f"f{str(int(value))}"