From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Tue, 21 Sep 2021 14:45:49 +0000 (+0100)
Subject: fix borked TestState.get_mem() assumed simmem.depth existed
X-Git-Tag: DRAFT_SVP64_0_1
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=55fb1958bc219c35d900aa37db6390906a213ca3;p=openpower-isa.git

fix borked TestState.get_mem() assumed simmem.depth existed
---

diff --git a/src/openpower/test/state.py b/src/openpower/test/state.py
index e5227793..d7886fe8 100644
--- a/src/openpower/test/state.py
+++ b/src/openpower/test/state.py
@@ -121,13 +121,13 @@ class SimState(State):
     def get_mem(self):
         if False:
             yield
-        # obtain full list of contents of memory.  assume starts
-        # at address zero.  assumes 64-bit addresses.  use
-        # Mem.ld in order to get data in the correct byteorder
-        simmem = self.sim.mem
-        self.mem = []
-        for i in range(simmem.depth):
-            self.mem.append((i*8), simmem.ld(i*8, 8, False))
+        keys = list(self.sim.mem.mem.keys())
+        self.mem = {}
+        # from each address in the underlying mem-simulated dictionary
+        # issue a 64-bit LD (with no byte-swapping)
+        for k in keys:
+            data = self.sim.mem.ld(k*8, 8, False)
+            self.mem[k*8] = data
 
 
 class ExpectedState(State):