From: Andreas Krebbel <krebbel@linux.vnet.ibm.com>
Date: Wed, 12 Jul 2017 15:00:58 +0000 (+0000)
Subject: S/390: Remove loc splitter
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=561f6312f2fb078dcbe8fa8197a515b7abf339fe;p=gcc.git

S/390: Remove loc splitter

The backend splitter splitting a 3 operand load on condition into 2 is
wrong.  The S/390 load on condition instruction might trap on the
memory operand even if the condition is false.  So if the first load
on condition overwrites a register used as part of the memory address
of the second the second might trigger a segfault even if it does not
actually perform the load.

Trying to fix this I noticed that the generated code looks anyway
better without the splitter.  So removing the splitter entirely is the
way to go here.

gcc/ChangeLog:

2017-07-12  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

	* config/s390/s390.md: Remove movcc splitter.

From-SVN: r250153
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 1960a7e1a74..fa2a8722e78 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,7 @@
+2017-07-12  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
+
+	* config/s390/s390.md: Remove movcc splitter.
+
 2017-07-12  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
 
 	* config/s390/s390.c (s390_rtx_costs): Return proper costs for
diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md
index cfae171c2a0..0eef9b179ee 100644
--- a/gcc/config/s390/s390.md
+++ b/gcc/config/s390/s390.md
@@ -6600,14 +6600,14 @@
 })
 
 ; locr, loc, stoc, locgr, locg, stocg, lochi, locghi
-(define_insn_and_split "*mov<mode>cc"
-  [(set (match_operand:GPR 0 "nonimmediate_operand"   "=d,d,d,d,d,d,S,S,&d")
+(define_insn "*mov<mode>cc"
+  [(set (match_operand:GPR 0 "nonimmediate_operand"   "=d,d,d,d,d,d,S,S")
 	(if_then_else:GPR
 	  (match_operator 1 "s390_comparison"
-	    [(match_operand 2 "cc_reg_operand"        " c,c,c,c,c,c,c,c,c")
+	    [(match_operand 2 "cc_reg_operand"        " c,c,c,c,c,c,c,c")
 	     (match_operand 5 "const_int_operand"     "")])
-	  (match_operand:GPR 3 "loc_operand" " d,0,S,0,K,0,d,0,S")
-	  (match_operand:GPR 4 "loc_operand" " 0,d,0,S,0,K,0,d,S")))]
+	  (match_operand:GPR 3 "loc_operand" " d,0,S,0,K,0,d,0")
+	  (match_operand:GPR 4 "loc_operand" " 0,d,0,S,0,K,0,d")))]
   "TARGET_Z196"
   "@
    loc<g>r%C1\t%0,%3
@@ -6617,23 +6617,9 @@
    loc<g>hi%C1\t%0,%h3
    loc<g>hi%D1\t%0,%h4
    stoc<g>%C1\t%3,%0
-   stoc<g>%D1\t%4,%0
-   #"
-  "&& reload_completed
-   && MEM_P (operands[3]) && MEM_P (operands[4])"
-  [(set (match_dup 0)
-	(if_then_else:GPR
-	 (match_op_dup 1 [(match_dup 2) (const_int 0)])
-	 (match_dup 3)
-	 (match_dup 0)))
-   (set (match_dup 0)
-	(if_then_else:GPR
-	 (match_op_dup 1 [(match_dup 2) (const_int 0)])
-	 (match_dup 0)
-	 (match_dup 4)))]
-  ""
-  [(set_attr "op_type" "RRF,RRF,RSY,RSY,RIE,RIE,RSY,RSY,*")
-   (set_attr "cpu_facility" "*,*,*,*,z13,z13,*,*,*")])
+   stoc<g>%D1\t%4,%0"
+  [(set_attr "op_type" "RRF,RRF,RSY,RSY,RIE,RIE,RSY,RSY")
+   (set_attr "cpu_facility" "*,*,*,*,z13,z13,*,*")])
 
 ;;
 ;;- Multiply instructions.