From: Gabe Black <gblack@eecs.umich.edu>
Date: Wed, 2 Jun 2010 17:58:07 +0000 (-0500)
Subject: ARM: Decode the nop instruction.
X-Git-Tag: stable_2012_02_02~1245
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=566b2ff20c311375a1d25cde735ddfb70706b581;p=gem5.git

ARM: Decode the nop instruction.
---

diff --git a/src/arch/arm/isa/formats/branch.isa b/src/arch/arm/isa/formats/branch.isa
index 865a73b32..999126081 100644
--- a/src/arch/arm/isa/formats/branch.isa
+++ b/src/arch/arm/isa/formats/branch.isa
@@ -157,7 +157,7 @@ def format Thumb32BranchesAndMiscCtrl() {{
                         } else {
                             switch (op2) {
                               case 0x0:
-                                return new WarnUnimplemented("nop", machInst);
+                                return new NopInst(machInst);
                               case 0x1:
                                 return new WarnUnimplemented("yield", machInst);
                               case 0x2:
diff --git a/src/arch/arm/isa/formats/data.isa b/src/arch/arm/isa/formats/data.isa
index 7679aa355..51cb4fd03 100644
--- a/src/arch/arm/isa/formats/data.isa
+++ b/src/arch/arm/isa/formats/data.isa
@@ -1043,7 +1043,7 @@ def format Thumb16Misc() {{
                 return new WarnUnimplemented("it", machInst);
             switch (bits(machInst, 7, 4)) {
               case 0x0:
-                return new WarnUnimplemented("nop", machInst);
+                return new NopInst(machInst);
               case 0x1:
                 return new WarnUnimplemented("yield", machInst);
               case 0x2:
diff --git a/src/arch/arm/isa/formats/uncond.isa b/src/arch/arm/isa/formats/uncond.isa
index 1b3c323aa..cd041f21b 100644
--- a/src/arch/arm/isa/formats/uncond.isa
+++ b/src/arch/arm/isa/formats/uncond.isa
@@ -58,7 +58,7 @@ def format ArmUnconditional() {{
                             machInst);
                 } else if (bits(op1, 2, 0) == 1) {
                     // Unallocated memory hint
-                    return new WarnUnimplemented("nop", machInst);
+                    return new NopInst(machInst);
                 } else if (bits(op1, 2, 0) == 5) {
                     const bool add = bits(machInst, 23);
                     const uint32_t imm12 = bits(machInst, 11, 0);
@@ -108,7 +108,7 @@ def format ArmUnconditional() {{
                 switch (op1 & 0xf7) {
                   case 0x61:
                     // Unallocated memory hint
-                    return new WarnUnimplemented("nop", machInst);
+                    return new NopInst(machInst);
                   case 0x65:
                     {
                         const uint32_t imm5 = bits(machInst, 11, 7);