From: Jason Ekstrand Date: Mon, 28 May 2018 16:42:49 +0000 (-0700) Subject: intel/fs: Mark LINTERP opcode as writing accumulator on platforms without PLN X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=566e6abd6d70266aea2f43ad9fefaf7718d76c57;p=mesa.git intel/fs: Mark LINTERP opcode as writing accumulator on platforms without PLN When we don't have PLN (gen4 and gen11+), we implement LINTERP as either LINE+MAC or a pair of MADs. In both cases, the accumulator is written by the first of the two instructions and read by the second. Even though the accumulator value isn't actually ever used from a logical instruction perspective, it is trashed so we need to make the scheduler aware. Otherwise, the scheduler could end up re-ordering instructions and putting a LINTERP between another an instruction which writes the accumulator and another which tries to use that result. Cc: mesa-stable@lists.freedesktop.org Reviewed-by: Matt Turner --- diff --git a/src/intel/compiler/brw_shader.cpp b/src/intel/compiler/brw_shader.cpp index cf04003c9c1..5a3070e5d2e 100644 --- a/src/intel/compiler/brw_shader.cpp +++ b/src/intel/compiler/brw_shader.cpp @@ -987,7 +987,8 @@ backend_instruction::writes_accumulator_implicitly(const struct gen_device_info return writes_accumulator || (devinfo->gen < 6 && ((opcode >= BRW_OPCODE_ADD && opcode < BRW_OPCODE_NOP) || - (opcode >= FS_OPCODE_DDX_COARSE && opcode <= FS_OPCODE_LINTERP))); + (opcode >= FS_OPCODE_DDX_COARSE && opcode <= FS_OPCODE_LINTERP))) || + (opcode == FS_OPCODE_LINTERP && !devinfo->has_pln); } bool