From: Eddie Hung <eddie@fpgeh.com>
Date: Sat, 21 Sep 2019 00:42:36 +0000 (-0700)
Subject: Fix first testcase in #1391
X-Git-Tag: working-ls180~1050^2~4
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=567e5f0aa7816bf92e0f1cb885af6fa333863163;p=yosys.git

Fix first testcase in #1391
---

diff --git a/passes/techmap/abc9.cc b/passes/techmap/abc9.cc
index 7eac08d17..7715fb291 100644
--- a/passes/techmap/abc9.cc
+++ b/passes/techmap/abc9.cc
@@ -30,7 +30,7 @@
 						"&st; &if -g -K 6; &synch2; &if {W} -v; &save; &load; "\
 						"&mfs; &ps -l"
 #else
-#define ABC_COMMAND_LUT "&st; &scorr; &sweep; &dc2; &st; &dch -f; &ps; &if {W} {D} -v; &mfs; &ps -l"
+#define ABC_COMMAND_LUT "&st; &scorr; &sweep; &dc2; &st; &dch -f; &ps; &if {W} {D} -v -w; &mfs; &ps -l"
 #endif
 
 
diff --git a/passes/techmap/techmap.cc b/passes/techmap/techmap.cc
index cf40b2f17..3cc3edbcb 100644
--- a/passes/techmap/techmap.cc
+++ b/passes/techmap/techmap.cc
@@ -224,7 +224,7 @@ struct TechmapWorker
 
 					for (auto bit : sigmaps.at(tpl)(it.second))
 						if (bit.wire != nullptr)
-							autopurge_tpl_bits.insert(it.second);
+							autopurge_tpl_bits.insert(bit);
 				}
 			}
 			IdString w_name = it.second->name;