From: lkcl <lkcl@web>
Date: Mon, 11 Oct 2021 16:05:17 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~3651
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=569df086f01c9f1b8b06c5bf09170e0fc23fac08;p=libreriscv.git

---

diff --git a/openpower/sv/svp64.mdwn b/openpower/sv/svp64.mdwn
index 57b6d849b..58bc6102c 100644
--- a/openpower/sv/svp64.mdwn
+++ b/openpower/sv/svp64.mdwn
@@ -74,7 +74,8 @@ For the new fields added in SVP64, instructions that have any of their
 fields set to a reserved value must cause an illegal instruction trap,
 to allow emulation of future instruction sets.  Unless otherwise stated, reserved values are always all zeros.
 
-This is unlike OpenPower ISA v3.1, which in many instances does not require a trap if reserved fields are nonzero.
+This is unlike OpenPower ISA v3.1, which in many instances does not require a trap if reserved fields are nonzero.  Where the standard OpenPOWER definition
+is intended the red keyword `RESERVED` is used.
 
 # Identity Behaviour