From: Eddie Hung <eddie@fpgeh.com>
Date: Thu, 14 May 2020 15:36:36 +0000 (-0700)
Subject: test: add another testcase as per @nakengelhardt
X-Git-Tag: working-ls180~554^2
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=56a5b1d2daf1b244990d81f32183034071ebd185;p=yosys.git

test: add another testcase as per @nakengelhardt
---

diff --git a/tests/verilog/bug2042-sv.ys b/tests/verilog/bug2042-sv.ys
index 9a0d419c8..e815d7fc5 100644
--- a/tests/verilog/bug2042-sv.ys
+++ b/tests/verilog/bug2042-sv.ys
@@ -20,6 +20,31 @@ proc
 sat -verify -prove-asserts
 
 
+design -reset
+read_verilog -sv <<EOT
+module Task_Test_Top
+(
+input a,
+output b, c
+);
+
+    task SomeTaskName(x, output y, z);
+       y = ~x;
+       z = x;
+    endtask
+
+    always @*
+        SomeTaskName(a, b, c);
+
+    assert property (b == ~a);
+    assert property (c == a);
+
+endmodule
+EOT
+proc
+sat -verify -prove-asserts
+
+
 design -reset
 logger -expect error "syntax error, unexpected TOK_ENDTASK, expecting ';'" 1
 read_verilog -sv <<EOT