From: Michael Nolan <mtnolan2640@gmail.com>
Date: Mon, 27 Jan 2020 02:10:31 +0000 (-0500)
Subject: Pep8 cleanup of FSGNJ module
X-Git-Tag: ls180-24jan2020~337
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=57153be18503551145684ad10bf63c83e1be412b;p=ieee754fpu.git

Pep8 cleanup of FSGNJ module
---

diff --git a/src/ieee754/fsgnj/fsgnj.py b/src/ieee754/fsgnj/fsgnj.py
index 8aef149c..66218191 100644
--- a/src/ieee754/fsgnj/fsgnj.py
+++ b/src/ieee754/fsgnj/fsgnj.py
@@ -1,19 +1,16 @@
 # IEEE Floating Point Conversion
 # Copyright (C) 2019 Luke Kenneth Casson Leighton <lkcl@lkcl.net>
 
-from nmigen import Module, Signal, Cat, Mux
-from nmigen.cli import main, verilog
+from nmigen import Module, Signal, Cat
 
 from nmutil.pipemodbase import PipeModBase
 from ieee754.fpcommon.basedata import FPBaseData
-from ieee754.fpcommon.postcalc import FPPostCalcData
 from ieee754.fpcommon.packdata import FPPackData
 
-from ieee754.fpcommon.fpbase import FPNumBaseRecord
-
 
 class FSGNJPipeMod(PipeModBase):
-    """ FP Sign injection - replaces operand A's sign bit with one generated from operand B
+    """ FP Sign injection - replaces operand A's sign bit with one
+        generated from operand B
 
         self.ctx.i.op & 0x3 == 0x0 : Copy sign bit from operand B
         self.ctx.i.op & 0x3 == 0x1 : Copy inverted sign bit from operand B
@@ -33,9 +30,6 @@ class FSGNJPipeMod(PipeModBase):
         m = Module()
         comb = m.d.comb
 
-        #m.submodules.sc_out_z = self.o.z
-
-        # decode: XXX really should move to separate stage
         z1 = self.o.z
         a = self.i.a
         b = self.i.b
@@ -54,7 +48,6 @@ class FSGNJPipeMod(PipeModBase):
 
         comb += z1.eq(Cat(a[0:31], sign))
 
-
         # copy the context (muxid, operator)
         comb += self.o.ctx.eq(self.i.ctx)
 
diff --git a/src/ieee754/fsgnj/pipeline.py b/src/ieee754/fsgnj/pipeline.py
index cf801efb..0270e857 100644
--- a/src/ieee754/fsgnj/pipeline.py
+++ b/src/ieee754/fsgnj/pipeline.py
@@ -4,26 +4,21 @@ Copyright (C) 2019 Luke Kenneth Casson Leighton <lkcl@lkcl.net>
 
 """
 
-import sys
-import functools
-
 from nmutil.singlepipe import ControlBase
 from nmutil.concurrentunit import ReservationStations, num_bits
 
-from ieee754.fpcommon.normtopack import FPNormToPack
 from ieee754.pipeline import PipelineSpec, DynamicPipe
 
 from ieee754.fsgnj.fsgnj import FSGNJPipeMod
 
 
-
 class FSGNJStage(DynamicPipe):
     """ FPConversion and De-norm
     """
 
     def __init__(self, in_pspec):
-        sc = FSGNJPipeMod(in_pspec)
-        in_pspec.stage = sc
+        stage = FSGNJPipeMod(in_pspec)
+        in_pspec.stage = stage
         super().__init__(in_pspec)
 
 
diff --git a/src/ieee754/fsgnj/test/test_fsgnj_pipe.py b/src/ieee754/fsgnj/test/test_fsgnj_pipe.py
index ded01e3b..a465c9da 100644
--- a/src/ieee754/fsgnj/test/test_fsgnj_pipe.py
+++ b/src/ieee754/fsgnj/test/test_fsgnj_pipe.py
@@ -4,42 +4,42 @@
 from ieee754.fsgnj.pipeline import (FSGNJMuxInOut)
 from ieee754.fpcommon.test.fpmux import runfp
 
-import sfpy
-from sfpy import Float64, Float32, Float16
+from sfpy import Float32
 
 
-
-######################
-# signed int to fp
-######################
-
 def fsgnj_f32_mov(a, b):
     return Float32.from_bits((a.bits & 0x7fffffff) | (b.bits & 0x80000000))
 
+
 def fsgnj_f32_neg(a, b):
     sign = b.bits & 0x80000000
     sign = sign ^ 0x80000000
     return Float32.from_bits((a.bits & 0x7fffffff) | sign)
 
+
 def fsgnj_f32_abs(a, b):
     bsign = b.bits & 0x80000000
     asign = a.bits & 0x80000000
     sign = asign ^ bsign
     return Float32.from_bits((a.bits & 0x7fffffff) | sign)
 
+
 def test_fsgnj_mov():
     dut = FSGNJMuxInOut(32, 4)
     runfp(dut, 32, "test_fsgnj_f32_mov", Float32, fsgnj_f32_mov,
-                False, n_vals=10, opcode=0x0)
+          n_vals=10, opcode=0x0)
+
+
 def test_fsgnj_neg():
     dut = FSGNJMuxInOut(32, 4)
     runfp(dut, 32, "test_fsgnj_f32_neg", Float32, fsgnj_f32_neg,
-                False, n_vals=10, opcode=0x1)
+          n_vals=10, opcode=0x1)
+
 
 def test_fsgnj_abs():
     dut = FSGNJMuxInOut(32, 4)
     runfp(dut, 32, "test_fsgnj_f32_abs", Float32, fsgnj_f32_abs,
-                False, n_vals=10, opcode=0x2)
+          n_vals=10, opcode=0x2)
 
 
 if __name__ == '__main__':