From: Vladimir Makarov Date: Thu, 26 May 2011 21:01:57 +0000 (+0000) Subject: re PR rtl-optimization/49154 (build fails on cris-elf in libgcc: ICE in setup_pressur... X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=574e418a27bf8e841df886a8156b9e1e6b362fc7;p=gcc.git re PR rtl-optimization/49154 (build fails on cris-elf in libgcc: ICE in setup_pressure_classes, at ira.c:902) 2011-05-26 Vladimir Makarov PR rtl-optimization/49154 * ira.c (setup_pressure_classes): Process class without sublcasses as a candidate for pressure classes. From-SVN: r174309 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 60553d56680..8e487e407f2 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2011-05-26 Vladimir Makarov + + PR rtl-optimization/49154 + * ira.c (setup_pressure_classes): Process class without sublcasses + as a candidate for pressure classes. + 2011-05-26 Richard Sandiford PR rtl-optimization/48575 diff --git a/gcc/ira.c b/gcc/ira.c index 358ad0a37b1..222d48eb1c4 100644 --- a/gcc/ira.c +++ b/gcc/ira.c @@ -799,7 +799,12 @@ setup_pressure_classes (void) { if (ira_available_class_regs[cl] == 0) continue; - if (ira_available_class_regs[cl] != 1) + if (ira_available_class_regs[cl] != 1 + /* A register class without subclasses may contain a few + hard registers and movement between them is costly + (e.g. SPARC FPCC registers). We still should consider it + as a candidate for a pressure class. */ + && alloc_reg_class_subclasses[cl][0] != LIM_REG_CLASSES) { /* Check that the moves between any hard registers of the current class are not more expensive for a legal mode