From: Luke Kenneth Casson Leighton Date: Sun, 5 Jul 2020 10:52:20 +0000 (+0100) Subject: check NIA on trap fu test X-Git-Tag: div_pipeline~162^2~71 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=574fbd6cfdcb369f5a360d8e16ebd86b07a03d4f;p=soc.git check NIA on trap fu test --- diff --git a/src/soc/fu/test/common.py b/src/soc/fu/test/common.py index 1143e895..85ad2e14 100644 --- a/src/soc/fu/test/common.py +++ b/src/soc/fu/test/common.py @@ -37,6 +37,10 @@ class ALUHelpers: def get_sim_cia(res, sim, dec2): res['cia'] = sim.pc.CIA.value + # use this *after* the simulation has run a step (it returns CIA) + def get_sim_nia(res, sim, dec2): + res['nia'] = sim.pc.CIA.value + def get_sim_msr(res, sim, dec2): res['msr'] = sim.msr.value @@ -317,6 +321,13 @@ class ALUHelpers: print(f"expected {expected:x}, actual: {alu_out:x}") dut.assertEqual(expected, alu_out, msg) + def check_nia(dut, res, sim_o, msg): + if 'nia' in res: + expected = sim_o['nia'] + alu_out = res['nia'] + print(f"expected {expected:x}, actual: {alu_out:x}") + dut.assertEqual(expected, alu_out, msg) + def check_cr_a(dut, res, sim_o, msg): if 'cr_a' in res: cr_expected = sim_o['cr_a'] diff --git a/src/soc/fu/trap/test/test_pipe_caller.py b/src/soc/fu/trap/test/test_pipe_caller.py index bc7d3c38..bfb19499 100644 --- a/src/soc/fu/trap/test/test_pipe_caller.py +++ b/src/soc/fu/trap/test/test_pipe_caller.py @@ -213,7 +213,7 @@ class TestRunner(FHDLTestCase): yield from ALUHelpers.get_sim_int_o(sim_o, sim, dec2) yield from ALUHelpers.get_wr_fast_spr1(sim_o, sim, dec2) yield from ALUHelpers.get_wr_fast_spr2(sim_o, sim, dec2) - ALUHelpers.get_sim_cia(sim_o, sim, dec2) + ALUHelpers.get_sim_nia(sim_o, sim, dec2) ALUHelpers.get_sim_msr(sim_o, sim, dec2) print ("sim output", sim_o) @@ -221,6 +221,7 @@ class TestRunner(FHDLTestCase): ALUHelpers.check_int_o(self, res, sim_o, code) ALUHelpers.check_fast_spr1(self, res, sim_o, code) ALUHelpers.check_fast_spr2(self, res, sim_o, code) + ALUHelpers.check_nia(self, res, sim_o, code) if __name__ == "__main__":