From: Matt Kraai <kraai@alumni.cmu.edu>
Date: Thu, 27 Jun 2002 17:19:06 +0000 (+0000)
Subject: install.texi: Change ` bit' to `-bit'.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=57694e401114cd1f5271bd329b614bdbf5e9bfe1;p=gcc.git

install.texi: Change ` bit' to `-bit'.

	* doc/install.texi: Change ` bit' to `-bit'.
	* doc/md.texi: Change `-bits' to `-bit'.
	* doc/tm.texi: Change `-bits' to ` bits'.

From-SVN: r55033
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 273924b1374..ca5317d09cd 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2002-06-27  Matt Kraai  <kraai@alumni.cmu.edu>
+
+	* doc/install.texi: Change ` bit' to `-bit'.
+	* doc/md.texi: Change `-bits' to `-bit'.
+	* doc/tm.texi: Change `-bits' to ` bits'.
+
 2002-06-27  Daniel Berlin  <dberlin@dberlin.org>
 
 	* gcse.c (hoist_code): Rewrite to only get list of dominated
diff --git a/gcc/doc/install.texi b/gcc/doc/install.texi
index c087bdfa62d..046cc81c15b 100644
--- a/gcc/doc/install.texi
+++ b/gcc/doc/install.texi
@@ -2693,7 +2693,7 @@ its maximum of 262144 bytes.  If you have root access, you can use the
 GCC does not correctly pass/return structures which are
 smaller than 16 bytes and which are not 8 bytes.  The problem is very
 involved and difficult to fix.  It affects a number of other targets also,
-but IRIX 6 is affected the most, because it is a 64 bit target, and 4 byte
+but IRIX 6 is affected the most, because it is a 64-bit target, and 4 byte
 structures are common.  The exact problem is that structures are being padded
 at the wrong end, e.g.@: a 4 byte structure is loaded into the lower 4 bytes
 of the register when it should be loaded into the upper 4 bytes of the
@@ -2843,7 +2843,7 @@ S/390 system running Linux for S/390@.
 <hr>
 @end html
 @heading @anchor{s390x-*-linux*}s390x-*-linux*
-zSeries system (64 Bit) running Linux for zSeries@.
+zSeries system (64-bit) running Linux for zSeries@.
 
 @html
 </p>
@@ -3124,7 +3124,7 @@ respects, this target is the same as the
 </p>
 <hr>
 @end html
-@heading @anchor{windows}Microsoft Windows (32 bit)
+@heading @anchor{windows}Microsoft Windows (32-bit)
 
 A port of GCC 2.95.x is included with the
 @uref{http://www.cygwin.com/,,Cygwin environment}.
diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi
index a346a2b1972..7c33f3230fb 100644
--- a/gcc/doc/md.texi
+++ b/gcc/doc/md.texi
@@ -1932,7 +1932,7 @@ A constant in the range supported by @code{movrcc} instructions
 
 @item N
 Same as @samp{K}, except that it verifies that bits that are not in the
-lower 32-bits range are all zero.  Must be used instead of @samp{K} for
+lower 32-bit range are all zero.  Must be used instead of @samp{K} for
 modes wider than @code{SImode}
 
 @item G
diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi
index 536b02c3d57..daebec717a6 100644
--- a/gcc/doc/tm.texi
+++ b/gcc/doc/tm.texi
@@ -2550,9 +2550,9 @@ A C expression that is true if, for a register in
 @code{CLASS_CANNOT_CHANGE_MODE}, the requested mode punning is invalid.
 
 For the example, loading 32-bit integer or floating-point objects into
-floating-point registers on the Alpha extends them to 64-bits.
+floating-point registers on the Alpha extends them to 64 bits.
 Therefore loading a 64-bit object and then storing it as a 32-bit object
-does not store the low-order 32-bits, as would be the case for a normal
+does not store the low-order 32 bits, as would be the case for a normal
 register.  Therefore, @file{alpha.h} defines @code{CLASS_CANNOT_CHANGE_MODE}
 as @code{FLOAT_REGS} and @code{CLASS_CANNOT_CHANGE_MODE_P} restricts
 mode changes to same-size modes.