From: Marek Olšák <marek.olsak@amd.com>
Date: Sun, 1 Apr 2018 22:42:33 +0000 (-0400)
Subject: radeonsi: move r600_cs.h contents into si_pipe.h, si_build_pm4.h
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=5777488406cc1a956bc9fb571f1dbc5a2833475a;p=mesa.git

radeonsi: move r600_cs.h contents into si_pipe.h, si_build_pm4.h

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
---

diff --git a/src/gallium/drivers/radeon/Makefile.sources b/src/gallium/drivers/radeon/Makefile.sources
index 2ecfeb077a3..8c355ef4fa4 100644
--- a/src/gallium/drivers/radeon/Makefile.sources
+++ b/src/gallium/drivers/radeon/Makefile.sources
@@ -1,6 +1,5 @@
 C_SOURCES := \
 	r600_buffer_common.c \
-	r600_cs.h \
 	r600_gpu_load.c \
 	r600_perfcounter.c \
 	r600_pipe_common.h \
diff --git a/src/gallium/drivers/radeon/r600_buffer_common.c b/src/gallium/drivers/radeon/r600_buffer_common.c
index c4f33e3bd73..0af97f4c427 100644
--- a/src/gallium/drivers/radeon/r600_buffer_common.c
+++ b/src/gallium/drivers/radeon/r600_buffer_common.c
@@ -23,7 +23,6 @@
  */
 
 #include "radeonsi/si_pipe.h"
-#include "r600_cs.h"
 #include "util/u_memory.h"
 #include "util/u_upload_mgr.h"
 #include <inttypes.h>
diff --git a/src/gallium/drivers/radeon/r600_cs.h b/src/gallium/drivers/radeon/r600_cs.h
deleted file mode 100644
index f5ef94bea31..00000000000
--- a/src/gallium/drivers/radeon/r600_cs.h
+++ /dev/null
@@ -1,192 +0,0 @@
-/*
- * Copyright 2013 Advanced Micro Devices, Inc.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * on the rights to use, copy, modify, merge, publish, distribute, sub
- * license, and/or sell copies of the Software, and to permit persons to whom
- * the Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
- * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
- * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
- * USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-/**
- * This file contains helpers for writing commands to commands streams.
- */
-
-#ifndef R600_CS_H
-#define R600_CS_H
-
-#include "radeonsi/si_pipe.h"
-#include "amd/common/sid.h"
-
-/**
- * Return true if there is enough memory in VRAM and GTT for the buffers
- * added so far.
- *
- * \param vram      VRAM memory size not added to the buffer list yet
- * \param gtt       GTT memory size not added to the buffer list yet
- */
-static inline bool
-radeon_cs_memory_below_limit(struct si_screen *screen,
-			     struct radeon_winsys_cs *cs,
-			     uint64_t vram, uint64_t gtt)
-{
-	vram += cs->used_vram;
-	gtt += cs->used_gart;
-
-	/* Anything that goes above the VRAM size should go to GTT. */
-	if (vram > screen->info.vram_size)
-		gtt += vram - screen->info.vram_size;
-
-	/* Now we just need to check if we have enough GTT. */
-	return gtt < screen->info.gart_size * 0.7;
-}
-
-/**
- * Add a buffer to the buffer list for the given command stream (CS).
- *
- * All buffers used by a CS must be added to the list. This tells the kernel
- * driver which buffers are used by GPU commands. Other buffers can
- * be swapped out (not accessible) during execution.
- *
- * The buffer list becomes empty after every context flush and must be
- * rebuilt.
- */
-static inline void radeon_add_to_buffer_list(struct si_context *sctx,
-					     struct radeon_winsys_cs *cs,
-					     struct r600_resource *rbo,
-					     enum radeon_bo_usage usage,
-					     enum radeon_bo_priority priority)
-{
-	assert(usage);
-	sctx->b.ws->cs_add_buffer(
-		cs, rbo->buf,
-		(enum radeon_bo_usage)(usage | RADEON_USAGE_SYNCHRONIZED),
-		rbo->domains, priority);
-}
-
-/**
- * Same as above, but also checks memory usage and flushes the context
- * accordingly.
- *
- * When this SHOULD NOT be used:
- *
- * - if si_context_add_resource_size has been called for the buffer
- *   followed by *_need_cs_space for checking the memory usage
- *
- * - if si_need_dma_space has been called for the buffer
- *
- * - when emitting state packets and draw packets (because preceding packets
- *   can't be re-emitted at that point)
- *
- * - if shader resource "enabled_mask" is not up-to-date or there is
- *   a different constraint disallowing a context flush
- */
-static inline void
-radeon_add_to_gfx_buffer_list_check_mem(struct si_context *sctx,
-					struct r600_resource *rbo,
-					enum radeon_bo_usage usage,
-					enum radeon_bo_priority priority,
-					bool check_mem)
-{
-	if (check_mem &&
-	    !radeon_cs_memory_below_limit(sctx->screen, sctx->b.gfx_cs,
-					  sctx->b.vram + rbo->vram_usage,
-					  sctx->b.gtt + rbo->gart_usage))
-		si_flush_gfx_cs(sctx, PIPE_FLUSH_ASYNC, NULL);
-
-	radeon_add_to_buffer_list(sctx, sctx->b.gfx_cs, rbo, usage, priority);
-}
-
-static inline void radeon_set_config_reg_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned num)
-{
-	assert(reg < SI_CONTEXT_REG_OFFSET);
-	assert(cs->current.cdw + 2 + num <= cs->current.max_dw);
-	radeon_emit(cs, PKT3(PKT3_SET_CONFIG_REG, num, 0));
-	radeon_emit(cs, (reg - SI_CONFIG_REG_OFFSET) >> 2);
-}
-
-static inline void radeon_set_config_reg(struct radeon_winsys_cs *cs, unsigned reg, unsigned value)
-{
-	radeon_set_config_reg_seq(cs, reg, 1);
-	radeon_emit(cs, value);
-}
-
-static inline void radeon_set_context_reg_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned num)
-{
-	assert(reg >= SI_CONTEXT_REG_OFFSET);
-	assert(cs->current.cdw + 2 + num <= cs->current.max_dw);
-	radeon_emit(cs, PKT3(PKT3_SET_CONTEXT_REG, num, 0));
-	radeon_emit(cs, (reg - SI_CONTEXT_REG_OFFSET) >> 2);
-}
-
-static inline void radeon_set_context_reg(struct radeon_winsys_cs *cs, unsigned reg, unsigned value)
-{
-	radeon_set_context_reg_seq(cs, reg, 1);
-	radeon_emit(cs, value);
-}
-
-static inline void radeon_set_context_reg_idx(struct radeon_winsys_cs *cs,
-					      unsigned reg, unsigned idx,
-					      unsigned value)
-{
-	assert(reg >= SI_CONTEXT_REG_OFFSET);
-	assert(cs->current.cdw + 3 <= cs->current.max_dw);
-	radeon_emit(cs, PKT3(PKT3_SET_CONTEXT_REG, 1, 0));
-	radeon_emit(cs, (reg - SI_CONTEXT_REG_OFFSET) >> 2 | (idx << 28));
-	radeon_emit(cs, value);
-}
-
-static inline void radeon_set_sh_reg_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned num)
-{
-	assert(reg >= SI_SH_REG_OFFSET && reg < SI_SH_REG_END);
-	assert(cs->current.cdw + 2 + num <= cs->current.max_dw);
-	radeon_emit(cs, PKT3(PKT3_SET_SH_REG, num, 0));
-	radeon_emit(cs, (reg - SI_SH_REG_OFFSET) >> 2);
-}
-
-static inline void radeon_set_sh_reg(struct radeon_winsys_cs *cs, unsigned reg, unsigned value)
-{
-	radeon_set_sh_reg_seq(cs, reg, 1);
-	radeon_emit(cs, value);
-}
-
-static inline void radeon_set_uconfig_reg_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned num)
-{
-	assert(reg >= CIK_UCONFIG_REG_OFFSET && reg < CIK_UCONFIG_REG_END);
-	assert(cs->current.cdw + 2 + num <= cs->current.max_dw);
-	radeon_emit(cs, PKT3(PKT3_SET_UCONFIG_REG, num, 0));
-	radeon_emit(cs, (reg - CIK_UCONFIG_REG_OFFSET) >> 2);
-}
-
-static inline void radeon_set_uconfig_reg(struct radeon_winsys_cs *cs, unsigned reg, unsigned value)
-{
-	radeon_set_uconfig_reg_seq(cs, reg, 1);
-	radeon_emit(cs, value);
-}
-
-static inline void radeon_set_uconfig_reg_idx(struct radeon_winsys_cs *cs,
-					      unsigned reg, unsigned idx,
-					      unsigned value)
-{
-	assert(reg >= CIK_UCONFIG_REG_OFFSET && reg < CIK_UCONFIG_REG_END);
-	assert(cs->current.cdw + 3 <= cs->current.max_dw);
-	radeon_emit(cs, PKT3(PKT3_SET_UCONFIG_REG, 1, 0));
-	radeon_emit(cs, (reg - CIK_UCONFIG_REG_OFFSET) >> 2 | (idx << 28));
-	radeon_emit(cs, value);
-}
-
-#endif
diff --git a/src/gallium/drivers/radeon/r600_query.c b/src/gallium/drivers/radeon/r600_query.c
index a2553d17b1d..171f4838f47 100644
--- a/src/gallium/drivers/radeon/r600_query.c
+++ b/src/gallium/drivers/radeon/r600_query.c
@@ -26,7 +26,6 @@
 
 #include "radeonsi/si_pipe.h"
 #include "r600_query.h"
-#include "r600_cs.h"
 #include "util/u_memory.h"
 #include "util/u_upload_mgr.h"
 #include "util/os_time.h"
diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c
index af226877e8f..cdca6c1f48d 100644
--- a/src/gallium/drivers/radeon/r600_texture.c
+++ b/src/gallium/drivers/radeon/r600_texture.c
@@ -24,7 +24,6 @@
  */
 
 #include "radeonsi/si_pipe.h"
-#include "r600_cs.h"
 #include "r600_query.h"
 #include "util/u_format.h"
 #include "util/u_log.h"
diff --git a/src/gallium/drivers/radeonsi/si_build_pm4.h b/src/gallium/drivers/radeonsi/si_build_pm4.h
new file mode 100644
index 00000000000..22f5558b7f1
--- /dev/null
+++ b/src/gallium/drivers/radeonsi/si_build_pm4.h
@@ -0,0 +1,113 @@
+/*
+ * Copyright 2013 Advanced Micro Devices, Inc.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * on the rights to use, copy, modify, merge, publish, distribute, sub
+ * license, and/or sell copies of the Software, and to permit persons to whom
+ * the Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/**
+ * This file contains helpers for writing commands to commands streams.
+ */
+
+#ifndef SI_BUILD_PM4_H
+#define SI_BUILD_PM4_H
+
+#include "si_pipe.h"
+#include "sid.h"
+
+static inline void radeon_set_config_reg_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned num)
+{
+	assert(reg < SI_CONTEXT_REG_OFFSET);
+	assert(cs->current.cdw + 2 + num <= cs->current.max_dw);
+	radeon_emit(cs, PKT3(PKT3_SET_CONFIG_REG, num, 0));
+	radeon_emit(cs, (reg - SI_CONFIG_REG_OFFSET) >> 2);
+}
+
+static inline void radeon_set_config_reg(struct radeon_winsys_cs *cs, unsigned reg, unsigned value)
+{
+	radeon_set_config_reg_seq(cs, reg, 1);
+	radeon_emit(cs, value);
+}
+
+static inline void radeon_set_context_reg_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned num)
+{
+	assert(reg >= SI_CONTEXT_REG_OFFSET);
+	assert(cs->current.cdw + 2 + num <= cs->current.max_dw);
+	radeon_emit(cs, PKT3(PKT3_SET_CONTEXT_REG, num, 0));
+	radeon_emit(cs, (reg - SI_CONTEXT_REG_OFFSET) >> 2);
+}
+
+static inline void radeon_set_context_reg(struct radeon_winsys_cs *cs, unsigned reg, unsigned value)
+{
+	radeon_set_context_reg_seq(cs, reg, 1);
+	radeon_emit(cs, value);
+}
+
+static inline void radeon_set_context_reg_idx(struct radeon_winsys_cs *cs,
+					      unsigned reg, unsigned idx,
+					      unsigned value)
+{
+	assert(reg >= SI_CONTEXT_REG_OFFSET);
+	assert(cs->current.cdw + 3 <= cs->current.max_dw);
+	radeon_emit(cs, PKT3(PKT3_SET_CONTEXT_REG, 1, 0));
+	radeon_emit(cs, (reg - SI_CONTEXT_REG_OFFSET) >> 2 | (idx << 28));
+	radeon_emit(cs, value);
+}
+
+static inline void radeon_set_sh_reg_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned num)
+{
+	assert(reg >= SI_SH_REG_OFFSET && reg < SI_SH_REG_END);
+	assert(cs->current.cdw + 2 + num <= cs->current.max_dw);
+	radeon_emit(cs, PKT3(PKT3_SET_SH_REG, num, 0));
+	radeon_emit(cs, (reg - SI_SH_REG_OFFSET) >> 2);
+}
+
+static inline void radeon_set_sh_reg(struct radeon_winsys_cs *cs, unsigned reg, unsigned value)
+{
+	radeon_set_sh_reg_seq(cs, reg, 1);
+	radeon_emit(cs, value);
+}
+
+static inline void radeon_set_uconfig_reg_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned num)
+{
+	assert(reg >= CIK_UCONFIG_REG_OFFSET && reg < CIK_UCONFIG_REG_END);
+	assert(cs->current.cdw + 2 + num <= cs->current.max_dw);
+	radeon_emit(cs, PKT3(PKT3_SET_UCONFIG_REG, num, 0));
+	radeon_emit(cs, (reg - CIK_UCONFIG_REG_OFFSET) >> 2);
+}
+
+static inline void radeon_set_uconfig_reg(struct radeon_winsys_cs *cs, unsigned reg, unsigned value)
+{
+	radeon_set_uconfig_reg_seq(cs, reg, 1);
+	radeon_emit(cs, value);
+}
+
+static inline void radeon_set_uconfig_reg_idx(struct radeon_winsys_cs *cs,
+					      unsigned reg, unsigned idx,
+					      unsigned value)
+{
+	assert(reg >= CIK_UCONFIG_REG_OFFSET && reg < CIK_UCONFIG_REG_END);
+	assert(cs->current.cdw + 3 <= cs->current.max_dw);
+	radeon_emit(cs, PKT3(PKT3_SET_UCONFIG_REG, 1, 0));
+	radeon_emit(cs, (reg - CIK_UCONFIG_REG_OFFSET) >> 2 | (idx << 28));
+	radeon_emit(cs, value);
+}
+
+#endif
diff --git a/src/gallium/drivers/radeonsi/si_compute.c b/src/gallium/drivers/radeonsi/si_compute.c
index 8c0d80fa043..c2e2d613773 100644
--- a/src/gallium/drivers/radeonsi/si_compute.c
+++ b/src/gallium/drivers/radeonsi/si_compute.c
@@ -29,10 +29,8 @@
 #include "util/u_upload_mgr.h"
 
 #include "amd_kernel_code_t.h"
-#include "radeon/r600_cs.h"
-#include "si_pipe.h"
+#include "si_build_pm4.h"
 #include "si_compute.h"
-#include "sid.h"
 
 #define COMPUTE_DBG(rscreen, fmt, args...) \
 	do { \
diff --git a/src/gallium/drivers/radeonsi/si_cp_dma.c b/src/gallium/drivers/radeonsi/si_cp_dma.c
index ffdb78c3e40..b6274af10d9 100644
--- a/src/gallium/drivers/radeonsi/si_cp_dma.c
+++ b/src/gallium/drivers/radeonsi/si_cp_dma.c
@@ -24,7 +24,6 @@
 
 #include "si_pipe.h"
 #include "sid.h"
-#include "radeon/r600_cs.h"
 
 /* Recommended maximum sizes for optimal performance.
  * Fall back to compute or SDMA if the size is greater.
diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c b/src/gallium/drivers/radeonsi/si_descriptors.c
index d97fcb1d93b..223724b29b8 100644
--- a/src/gallium/drivers/radeonsi/si_descriptors.c
+++ b/src/gallium/drivers/radeonsi/si_descriptors.c
@@ -53,7 +53,6 @@
  * Sampler states are never unbound except when FMASK is bound.
  */
 
-#include "radeon/r600_cs.h"
 #include "si_pipe.h"
 #include "sid.h"
 #include "gfx9d.h"
diff --git a/src/gallium/drivers/radeonsi/si_dma_cs.c b/src/gallium/drivers/radeonsi/si_dma_cs.c
index fbe88acd187..10d6d62c52e 100644
--- a/src/gallium/drivers/radeonsi/si_dma_cs.c
+++ b/src/gallium/drivers/radeonsi/si_dma_cs.c
@@ -23,7 +23,6 @@
  */
 
 #include "si_pipe.h"
-#include "radeon/r600_cs.h"
 
 static void si_dma_emit_wait_idle(struct si_context *sctx)
 {
diff --git a/src/gallium/drivers/radeonsi/si_fence.c b/src/gallium/drivers/radeonsi/si_fence.c
index 22087ec95fe..e43560ab033 100644
--- a/src/gallium/drivers/radeonsi/si_fence.c
+++ b/src/gallium/drivers/radeonsi/si_fence.c
@@ -30,8 +30,7 @@
 #include "util/u_queue.h"
 #include "util/u_upload_mgr.h"
 
-#include "si_pipe.h"
-#include "radeon/r600_cs.h"
+#include "si_build_pm4.h"
 
 struct si_fine_fence {
 	struct r600_resource *buf;
diff --git a/src/gallium/drivers/radeonsi/si_gfx_cs.c b/src/gallium/drivers/radeonsi/si_gfx_cs.c
index 4340651b68f..4450cb6d776 100644
--- a/src/gallium/drivers/radeonsi/si_gfx_cs.c
+++ b/src/gallium/drivers/radeonsi/si_gfx_cs.c
@@ -24,7 +24,6 @@
  */
 
 #include "si_pipe.h"
-#include "radeon/r600_cs.h"
 
 #include "util/os_time.h"
 
diff --git a/src/gallium/drivers/radeonsi/si_perfcounter.c b/src/gallium/drivers/radeonsi/si_perfcounter.c
index 5700b911d29..0593d5523b8 100644
--- a/src/gallium/drivers/radeonsi/si_perfcounter.c
+++ b/src/gallium/drivers/radeonsi/si_perfcounter.c
@@ -22,12 +22,10 @@
  * SOFTWARE.
  */
 
-#include "radeon/r600_cs.h"
+#include "si_build_pm4.h"
 #include "radeon/r600_query.h"
 #include "util/u_memory.h"
 
-#include "si_pipe.h"
-#include "sid.h"
 
 enum si_pc_reg_layout {
 	/* All secondary selector dwords follow as one block after the primary
diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h
index 0ae28a235c9..ab58ec5a484 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.h
+++ b/src/gallium/drivers/radeonsi/si_pipe.h
@@ -1063,6 +1063,85 @@ static inline unsigned si_get_total_colormask(struct si_context *sctx)
 	return colormask;
 }
 
+/**
+ * Return true if there is enough memory in VRAM and GTT for the buffers
+ * added so far.
+ *
+ * \param vram      VRAM memory size not added to the buffer list yet
+ * \param gtt       GTT memory size not added to the buffer list yet
+ */
+static inline bool
+radeon_cs_memory_below_limit(struct si_screen *screen,
+			     struct radeon_winsys_cs *cs,
+			     uint64_t vram, uint64_t gtt)
+{
+	vram += cs->used_vram;
+	gtt += cs->used_gart;
+
+	/* Anything that goes above the VRAM size should go to GTT. */
+	if (vram > screen->info.vram_size)
+		gtt += vram - screen->info.vram_size;
+
+	/* Now we just need to check if we have enough GTT. */
+	return gtt < screen->info.gart_size * 0.7;
+}
+
+/**
+ * Add a buffer to the buffer list for the given command stream (CS).
+ *
+ * All buffers used by a CS must be added to the list. This tells the kernel
+ * driver which buffers are used by GPU commands. Other buffers can
+ * be swapped out (not accessible) during execution.
+ *
+ * The buffer list becomes empty after every context flush and must be
+ * rebuilt.
+ */
+static inline void radeon_add_to_buffer_list(struct si_context *sctx,
+					     struct radeon_winsys_cs *cs,
+					     struct r600_resource *rbo,
+					     enum radeon_bo_usage usage,
+					     enum radeon_bo_priority priority)
+{
+	assert(usage);
+	sctx->b.ws->cs_add_buffer(
+		cs, rbo->buf,
+		(enum radeon_bo_usage)(usage | RADEON_USAGE_SYNCHRONIZED),
+		rbo->domains, priority);
+}
+
+/**
+ * Same as above, but also checks memory usage and flushes the context
+ * accordingly.
+ *
+ * When this SHOULD NOT be used:
+ *
+ * - if si_context_add_resource_size has been called for the buffer
+ *   followed by *_need_cs_space for checking the memory usage
+ *
+ * - if si_need_dma_space has been called for the buffer
+ *
+ * - when emitting state packets and draw packets (because preceding packets
+ *   can't be re-emitted at that point)
+ *
+ * - if shader resource "enabled_mask" is not up-to-date or there is
+ *   a different constraint disallowing a context flush
+ */
+static inline void
+radeon_add_to_gfx_buffer_list_check_mem(struct si_context *sctx,
+					struct r600_resource *rbo,
+					enum radeon_bo_usage usage,
+					enum radeon_bo_priority priority,
+					bool check_mem)
+{
+	if (check_mem &&
+	    !radeon_cs_memory_below_limit(sctx->screen, sctx->b.gfx_cs,
+					  sctx->b.vram + rbo->vram_usage,
+					  sctx->b.gtt + rbo->gart_usage))
+		si_flush_gfx_cs(sctx, PIPE_FLUSH_ASYNC, NULL);
+
+	radeon_add_to_buffer_list(sctx, sctx->b.gfx_cs, rbo, usage, priority);
+}
+
 #define PRINT_ERR(fmt, args...) \
 	fprintf(stderr, "EE %s:%d %s - " fmt, __FILE__, __LINE__, __func__, ##args)
 
diff --git a/src/gallium/drivers/radeonsi/si_pm4.c b/src/gallium/drivers/radeonsi/si_pm4.c
index b9f2a017866..a05cc25c05c 100644
--- a/src/gallium/drivers/radeonsi/si_pm4.c
+++ b/src/gallium/drivers/radeonsi/si_pm4.c
@@ -22,7 +22,6 @@
  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  */
 
-#include "radeon/r600_cs.h"
 #include "util/u_memory.h"
 #include "si_pipe.h"
 #include "sid.h"
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index a085015d4dc..e4de521cac8 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -22,10 +22,8 @@
  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  */
 
-#include "si_pipe.h"
-#include "sid.h"
+#include "si_build_pm4.h"
 #include "gfx9d.h"
-#include "radeon/r600_cs.h"
 #include "radeon/r600_query.h"
 
 #include "util/u_dual_blend.h"
diff --git a/src/gallium/drivers/radeonsi/si_state_binning.c b/src/gallium/drivers/radeonsi/si_state_binning.c
index 5ed5c5cab91..d001b24dfc5 100644
--- a/src/gallium/drivers/radeonsi/si_state_binning.c
+++ b/src/gallium/drivers/radeonsi/si_state_binning.c
@@ -24,10 +24,8 @@
 
 /* This file handles register programming of primitive binning. */
 
-#include "si_pipe.h"
-#include "sid.h"
+#include "si_build_pm4.h"
 #include "gfx9d.h"
-#include "radeon/r600_cs.h"
 
 struct uvec2 {
 	unsigned x, y;
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
index bf39d4cd2e3..f0db029e220 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -22,9 +22,7 @@
  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  */
 
-#include "si_pipe.h"
-#include "radeon/r600_cs.h"
-#include "sid.h"
+#include "si_build_pm4.h"
 #include "gfx9d.h"
 
 #include "util/u_index_modify.h"
diff --git a/src/gallium/drivers/radeonsi/si_state_msaa.c b/src/gallium/drivers/radeonsi/si_state_msaa.c
index fbd6e87d1a9..890e0d479e3 100644
--- a/src/gallium/drivers/radeonsi/si_state_msaa.c
+++ b/src/gallium/drivers/radeonsi/si_state_msaa.c
@@ -22,9 +22,7 @@
  * SOFTWARE.
  */
 
-#include "si_pipe.h"
-#include "sid.h"
-#include "radeon/r600_cs.h"
+#include "si_build_pm4.h"
 
 /* For MSAA sample positions. */
 #define FILL_SREG(s0x, s0y, s1x, s1y, s2x, s2y, s3x, s3y)  \
diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c b/src/gallium/drivers/radeonsi/si_state_shaders.c
index eff7b810d56..2c8ffd7f672 100644
--- a/src/gallium/drivers/radeonsi/si_state_shaders.c
+++ b/src/gallium/drivers/radeonsi/si_state_shaders.c
@@ -22,10 +22,8 @@
  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  */
 
-#include "si_pipe.h"
-#include "sid.h"
+#include "si_build_pm4.h"
 #include "gfx9d.h"
-#include "radeon/r600_cs.h"
 
 #include "compiler/nir/nir_serialize.h"
 #include "tgsi/tgsi_parse.h"
diff --git a/src/gallium/drivers/radeonsi/si_state_streamout.c b/src/gallium/drivers/radeonsi/si_state_streamout.c
index 21a5c88c512..e70f667f097 100644
--- a/src/gallium/drivers/radeonsi/si_state_streamout.c
+++ b/src/gallium/drivers/radeonsi/si_state_streamout.c
@@ -22,10 +22,7 @@
  * SOFTWARE.
  */
 
-#include "si_pipe.h"
-#include "si_state.h"
-#include "sid.h"
-#include "radeon/r600_cs.h"
+#include "si_build_pm4.h"
 
 #include "util/u_memory.h"
 
diff --git a/src/gallium/drivers/radeonsi/si_state_viewport.c b/src/gallium/drivers/radeonsi/si_state_viewport.c
index d02542e4c10..a3482a8f30b 100644
--- a/src/gallium/drivers/radeonsi/si_state_viewport.c
+++ b/src/gallium/drivers/radeonsi/si_state_viewport.c
@@ -22,9 +22,7 @@
  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  */
 
-#include "si_pipe.h"
-#include "sid.h"
-#include "radeon/r600_cs.h"
+#include "si_build_pm4.h"
 #include "util/u_viewport.h"
 #include "tgsi/tgsi_scan.h"