From: Jason Ekstrand <jason.ekstrand@intel.com>
Date: Thu, 22 Oct 2015 01:17:11 +0000 (-0700)
Subject: nir/spirv: Add support for various barrier type instructions
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=5790ee2bbbf039e0886ad02d0c9f0e929ad7ec87;p=mesa.git

nir/spirv: Add support for various barrier type instructions
---

diff --git a/src/glsl/nir/spirv_to_nir.c b/src/glsl/nir/spirv_to_nir.c
index b201019bab1..63f58bc2b2a 100644
--- a/src/glsl/nir/spirv_to_nir.c
+++ b/src/glsl/nir/spirv_to_nir.c
@@ -2268,6 +2268,37 @@ vtn_handle_composite(struct vtn_builder *b, SpvOp opcode,
    }
 }
 
+static void
+vtn_handle_barrier(struct vtn_builder *b, SpvOp opcode,
+                   const uint32_t *w, unsigned count)
+{
+   nir_intrinsic_op intrinsic_op;
+   switch (opcode) {
+   case SpvOpEmitVertex:
+   case SpvOpEmitStreamVertex:
+      intrinsic_op = nir_intrinsic_emit_vertex;
+      break;
+   case SpvOpEndPrimitive:
+   case SpvOpEndStreamPrimitive:
+      intrinsic_op = nir_intrinsic_end_primitive;
+      break;
+   case SpvOpMemoryBarrier:
+      intrinsic_op = nir_intrinsic_memory_barrier;
+      break;
+   case SpvOpControlBarrier:
+   default:
+      unreachable("unknown barrier instruction");
+   }
+
+   nir_intrinsic_instr *intrin =
+      nir_intrinsic_instr_create(b->shader, intrinsic_op);
+
+   if (opcode == SpvOpEmitStreamVertex || opcode == SpvOpEndStreamPrimitive)
+      intrin->const_index[0] = w[1];
+
+   nir_builder_instr_insert(&b->nb, &intrin->instr);
+}
+
 static void
 vtn_phi_node_init(struct vtn_builder *b, struct vtn_ssa_value *val)
 {
@@ -2892,6 +2923,15 @@ vtn_handle_body_instruction(struct vtn_builder *b, SpvOp opcode,
       vtn_handle_phi_first_pass(b, w);
       break;
 
+   case SpvOpEmitVertex:
+   case SpvOpEndPrimitive:
+   case SpvOpEmitStreamVertex:
+   case SpvOpEndStreamPrimitive:
+   case SpvOpControlBarrier:
+   case SpvOpMemoryBarrier:
+      vtn_handle_barrier(b, opcode, w, count);
+      break;
+
    default:
       unreachable("Unhandled opcode");
    }