From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Tue, 26 Sep 2023 15:08:42 +0000 (+0100)
Subject: add english language description for lbzupx
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=57933e330bfcb8e7d588ea484c152a289cd1fd3f;p=openpower-isa.git

add english language description for lbzupx
---

diff --git a/openpower/isa/pifixedload.mdwn b/openpower/isa/pifixedload.mdwn
index 045d3262..73b72db3 100644
--- a/openpower/isa/pifixedload.mdwn
+++ b/openpower/isa/pifixedload.mdwn
@@ -46,6 +46,16 @@ Pseudo-code:
     RT <- ([0] * (XLEN-8)) || MEM(EA, 1)
     RA <- (RA) + (RB)
 
+Description:
+
+    Let the effective address (EA) be register RA.
+    The byte in storage addressed by EA is loaded into
+    RT[56:63]. RT[0:55] are set to 0.
+
+    The sum (RA) + (RB) is placed into register RA.
+
+    If RA=0 or RA=RT, the instruction form is invalid.
+
 Special Registers Altered:
 
     None