From: Christian Bruel Date: Tue, 1 Dec 2015 14:50:57 +0000 (+0100) Subject: re PR target/68617 (arm ice output_operand: invalid %-code for -march=armv6k + thumb) X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=5797378aabcc51ef4de094f0160e451b45d6cfb7;p=gcc.git re PR target/68617 (arm ice output_operand: invalid %-code for -march=armv6k + thumb) 2015-12-01 Christian Bruel PR target/68617 * config/arm/arm.opt (unaligned_access): Save. * config/arm/arm-c.c (__ARM_FEATURE_UNALIGNED): Conditionally define. * config/arm/arm.c (arm_option_override): Move unaligned_access setting (arm_option_override_internal): ... here. * config/arm/arm.h (TARGET_32BIT_P): New macro. // testsuite PR target/68617 * gcc.target/arm/attr-unaligned-load-ice.c: New test. From-SVN: r231114 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 8c8718b2b30..10d90fe82c6 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,12 @@ +2015-12-01 Christian Bruel + + PR target/68617 + * config/arm/arm.opt (unaligned_access): Save. + * config/arm/arm-c.c (__ARM_FEATURE_UNALIGNED): Conditionally define. + * config/arm/arm.c (arm_option_override): Move unaligned_access setting + (arm_option_override_internal): ... here. + * config/arm/arm.h (TARGET_32BIT_P): New macro. + 2015-12-01 Richard Biener PR tree-optimization/68379 diff --git a/gcc/config/arm/arm-c.c b/gcc/config/arm/arm-c.c index c336a167086..7dee28ec52d 100644 --- a/gcc/config/arm/arm-c.c +++ b/gcc/config/arm/arm-c.c @@ -66,8 +66,8 @@ arm_cpu_builtins (struct cpp_reader* pfile) def_or_undef_macro (pfile, "__ARM_FEATURE_SAT", TARGET_ARM_SAT); def_or_undef_macro (pfile, "__ARM_FEATURE_CRYPTO", TARGET_CRYPTO); - if (unaligned_access) - builtin_define ("__ARM_FEATURE_UNALIGNED"); + def_or_undef_macro (pfile, "__ARM_FEATURE_UNALIGNED", unaligned_access); + if (TARGET_CRC32) builtin_define ("__ARM_FEATURE_CRC32"); diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index e0cdc209734..362329d5f37 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -2876,6 +2876,28 @@ arm_option_override_internal (struct gcc_options *opts, if (!TARGET_THUMB2_P (opts->x_target_flags)) opts->x_arm_restrict_it = 0; + /* Enable -munaligned-access by default for + - all ARMv6 architecture-based processors when compiling for a 32-bit ISA + i.e. Thumb2 and ARM state only. + - ARMv7-A, ARMv7-R, and ARMv7-M architecture-based processors. + - ARMv8 architecture-base processors. + + Disable -munaligned-access by default for + - all pre-ARMv6 architecture-based processors + - ARMv6-M architecture-based processors. */ + + if (! opts_set->x_unaligned_access) + { + opts->x_unaligned_access = (TARGET_32BIT_P (opts->x_target_flags) + && arm_arch6 && (arm_arch_notm || arm_arch7)); + } + else if (opts->x_unaligned_access == 1 + && !(arm_arch6 && (arm_arch_notm || arm_arch7))) + { + warning (0, "target CPU does not support unaligned accesses"); + opts->x_unaligned_access = 0; + } + /* Don't warn since it's on by default in -O2. */ if (TARGET_THUMB1_P (opts->x_target_flags)) opts->x_flag_schedule_insns = 0; @@ -3281,30 +3303,6 @@ arm_option_override (void) fix_cm3_ldrd = 0; } - /* Enable -munaligned-access by default for - - all ARMv6 architecture-based processors when compiling for a 32-bit ISA - i.e. Thumb2 and ARM state only. - - ARMv7-A, ARMv7-R, and ARMv7-M architecture-based processors. - - ARMv8 architecture-base processors. - - Disable -munaligned-access by default for - - all pre-ARMv6 architecture-based processors - - ARMv6-M architecture-based processors. */ - - if (unaligned_access == 2) - { - if (TARGET_32BIT && arm_arch6 && (arm_arch_notm || arm_arch7)) - unaligned_access = 1; - else - unaligned_access = 0; - } - else if (unaligned_access == 1 - && !(arm_arch6 && (arm_arch_notm || arm_arch7))) - { - warning (0, "target CPU does not support unaligned accesses"); - unaligned_access = 0; - } - /* Hot/Cold partitioning is not currently supported, since we can't handle literal pool placement in that case. */ if (flag_reorder_blocks_and_partition) diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h index 6ed8ad3823e..fd999dd0941 100644 --- a/gcc/config/arm/arm.h +++ b/gcc/config/arm/arm.h @@ -131,6 +131,7 @@ extern void (*arm_lang_output_object_attributes_hook)(void); #define TARGET_ARM_P(flags) (!TARGET_THUMB_P (flags)) #define TARGET_THUMB1_P(flags) (TARGET_THUMB_P (flags) && !arm_arch_thumb2) #define TARGET_THUMB2_P(flags) (TARGET_THUMB_P (flags) && arm_arch_thumb2) +#define TARGET_32BIT_P(flags) (TARGET_ARM_P (flags) || TARGET_THUMB2_P (flags)) /* Run-time Target Specification. */ #define TARGET_SOFT_FLOAT (arm_float_abi == ARM_FLOAT_ABI_SOFT) diff --git a/gcc/config/arm/arm.opt b/gcc/config/arm/arm.opt index 6f2db8f3a0d..1e438a9c092 100644 --- a/gcc/config/arm/arm.opt +++ b/gcc/config/arm/arm.opt @@ -267,7 +267,7 @@ Avoid overlapping destination and address registers on LDRD instructions that may trigger Cortex-M3 errata. munaligned-access -Target Report Var(unaligned_access) Init(2) +Target Report Var(unaligned_access) Init(2) Save Enable unaligned word and halfword accesses to packed data. mneon-for-64bits diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 0ad56153604..8463980e90e 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2015-12-01 Christian Bruel + + PR target/68617 + * gcc.target/arm/attr-unaligned-load-ice.c: New test. + 2015-12-01 Tom de Vries * gcc.dg/pr46032.c: Move to ... diff --git a/gcc/testsuite/gcc.target/arm/attr-unaligned-load-ice.c b/gcc/testsuite/gcc.target/arm/attr-unaligned-load-ice.c new file mode 100644 index 00000000000..e1ed1c148e0 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/attr-unaligned-load-ice.c @@ -0,0 +1,19 @@ +/* PR target/68617 + Verify that unaligned_access is correctly with attribute target. */ +/* { dg-do compile } */ +/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv6" } } */ +/* { dg-options "-Os -mfloat-abi=softfp -mtp=soft" } */ +/* { dg-add-options arm_arch_v6 } */ + +long __attribute__((target("thumb"))) +foo (char *s, long size, int unsigned_p) +{ + long x; + unsigned char *p = (unsigned char *) s; + switch (size) + { + case 4: + x = ((long) p[3] << 24) | ((long) p[2] << 16) | (p[1] << 8) | p[0]; + return x; + } +}