From: Jason Ekstrand Date: Tue, 1 Sep 2020 19:34:44 +0000 (-0500) Subject: intel/fs: Use a single untyped surface read for load_num_work_groups X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=5799da47c794aced34187df2eee6fd349c51b931;p=mesa.git intel/fs: Use a single untyped surface read for load_num_work_groups There's no good reason to split this into three. Sure, CS indirects are only guaranteed by the spec to be DWORD aligned, but that's all untyped surface reads require anyway. Reviewed-by: Kenneth Graunke Part-of: --- diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp index 0ef40625e33..10fffa13054 100644 --- a/src/intel/compiler/brw_fs_nir.cpp +++ b/src/intel/compiler/brw_fs_nir.cpp @@ -3767,14 +3767,12 @@ fs_visitor::nir_emit_cs_intrinsic(const fs_builder &bld, fs_reg srcs[SURFACE_LOGICAL_NUM_SRCS]; srcs[SURFACE_LOGICAL_SRC_SURFACE] = brw_imm_ud(surface); srcs[SURFACE_LOGICAL_SRC_IMM_DIMS] = brw_imm_ud(1); - srcs[SURFACE_LOGICAL_SRC_IMM_ARG] = brw_imm_ud(1); /* num components */ - - /* Read the 3 GLuint components of gl_NumWorkGroups */ - for (unsigned i = 0; i < 3; i++) { - srcs[SURFACE_LOGICAL_SRC_ADDRESS] = brw_imm_ud(i << 2); + srcs[SURFACE_LOGICAL_SRC_IMM_ARG] = brw_imm_ud(3); /* num components */ + srcs[SURFACE_LOGICAL_SRC_ADDRESS] = brw_imm_ud(0); + fs_inst *inst = bld.emit(SHADER_OPCODE_UNTYPED_SURFACE_READ_LOGICAL, - offset(dest, bld, i), srcs, SURFACE_LOGICAL_NUM_SRCS); - } + dest, srcs, SURFACE_LOGICAL_NUM_SRCS); + inst->size_written = 3 * dispatch_width * 4; break; }