From: Uros Bizjak Date: Thu, 16 Apr 2015 11:39:53 +0000 (+0200) Subject: i386.c (print_reg): Rewrite function. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=579cef8f39ea28afa93c2d84f959867a7caa1325;p=gcc.git i386.c (print_reg): Rewrite function. * config/i386/i386.c (print_reg): Rewrite function. From-SVN: r222145 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 9cd172753cc..4b661d1c928 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,7 @@ +2015-04-16 Uros Bizjak + + * config/i386/i386.c (print_reg): Rewrite function. + 2015-04-16 Andreas Krebbel * config/s390/s390.h (IRA_HARD_REGNO_ADD_COST_MULTIPLIER): diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index a607ef441ff..1f20ff394c8 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -15191,8 +15191,9 @@ void print_reg (rtx x, int code, FILE *file) { const char *reg; + int msize; unsigned int regno; - bool duplicated = code == 'd' && TARGET_AVX; + bool duplicated; if (ASSEMBLER_DIALECT == ASM_ATT) putc ('%', file); @@ -15204,82 +15205,49 @@ print_reg (rtx x, int code, FILE *file) return; } - regno = true_regnum (x); - gcc_assert (regno != ARG_POINTER_REGNUM - && regno != FRAME_POINTER_REGNUM - && regno != FLAGS_REG - && regno != FPSR_REG - && regno != FPCR_REG); + if (code == 'y' && STACK_TOP_P (x)) + { + fputs ("st(0)", file); + return; + } if (code == 'w') - code = 2; + msize = 2; else if (code == 'b') - code = 1; + msize = 1; else if (code == 'k') - code = 4; + msize = 4; else if (code == 'q') - code = 8; - else if (code == 'y') - code = 3; + msize = 8; else if (code == 'h') - code = 0; + msize = 0; else if (code == 'x') - code = 16; + msize = 16; else if (code == 't') - code = 32; + msize = 32; else if (code == 'g') - code = 64; + msize = 64; else - code = GET_MODE_SIZE (GET_MODE (x)); + msize = GET_MODE_SIZE (GET_MODE (x)); - /* Irritatingly, AMD extended registers use different naming convention - from the normal registers: "r%d[bwd]" */ - if (REX_INT_REGNO_P (regno)) - { - gcc_assert (TARGET_64BIT); - putc ('r', file); - fprint_ul (file, regno - FIRST_REX_INT_REG + 8); - switch (code) - { - case 0: - error ("extended registers have no high halves"); - break; - case 1: - putc ('b', file); - break; - case 2: - putc ('w', file); - break; - case 4: - putc ('d', file); - break; - case 8: - /* no suffix */ - break; - default: - error ("unsupported operand size for extended register"); - break; - } - return; - } + regno = true_regnum (x); - reg = NULL; - switch (code) + gcc_assert (regno != ARG_POINTER_REGNUM + && regno != FRAME_POINTER_REGNUM + && regno != FLAGS_REG + && regno != FPSR_REG + && regno != FPCR_REG); + + duplicated = code == 'd' && TARGET_AVX; + + switch (msize) { - case 3: - if (STACK_TOP_P (x)) - { - reg = "st(0)"; - break; - } - /* FALLTHRU */ case 8: case 4: - case 12: - if (LEGACY_INT_REG_P (x)) - putc (code == 8 && TARGET_64BIT ? 'r' : 'e', file); - /* FALLTHRU */ + if (LEGACY_INT_REGNO_P (regno)) + putc (msize == 8 ? 'r' : 'e', file); case 16: + case 12: case 2: normal: reg = hi_reg_name[regno]; @@ -15296,19 +15264,49 @@ print_reg (rtx x, int code, FILE *file) break; case 32: case 64: - if (SSE_REG_P (x)) + if (SSE_REGNO_P (regno)) { gcc_assert (!duplicated); - putc (code == 32 ? 'y' : 'z', file); - fputs (hi_reg_name[regno] + 1, file); - return; + putc (msize == 32 ? 'y' : 'z', file); + reg = hi_reg_name[regno] + 1; + break; } - break; + goto normal; default: gcc_unreachable (); } fputs (reg, file); + + /* Irritatingly, AMD extended registers use + different naming convention: "r%d[bwd]" */ + if (REX_INT_REGNO_P (regno)) + { + gcc_assert (TARGET_64BIT); + switch (msize) + { + case 0: + error ("extended registers have no high halves"); + break; + case 1: + putc ('b', file); + break; + case 2: + putc ('w', file); + break; + case 4: + putc ('d', file); + break; + case 8: + /* no suffix */ + break; + default: + error ("unsupported operand size for extended register"); + break; + } + return; + } + if (duplicated) { if (ASSEMBLER_DIALECT == ASM_ATT)