From: Andrew Waterman Date: Sat, 14 May 2011 00:31:45 +0000 (-0700) Subject: [sim] stubs for perfctr instructions X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=57b8698931384e769983f63eac25abd84a48f956;p=riscv-isa-sim.git [sim] stubs for perfctr instructions --- diff --git a/riscv/insns/rdcycle.h b/riscv/insns/rdcycle.h new file mode 100644 index 0000000..96f2a74 --- /dev/null +++ b/riscv/insns/rdcycle.h @@ -0,0 +1 @@ +throw trap_illegal_instruction; diff --git a/riscv/insns/rdinstret.h b/riscv/insns/rdinstret.h new file mode 100644 index 0000000..96f2a74 --- /dev/null +++ b/riscv/insns/rdinstret.h @@ -0,0 +1 @@ +throw trap_illegal_instruction; diff --git a/riscv/insns/rdtime.h b/riscv/insns/rdtime.h new file mode 100644 index 0000000..96f2a74 --- /dev/null +++ b/riscv/insns/rdtime.h @@ -0,0 +1 @@ +throw trap_illegal_instruction;