From: Jean THOMAS <git0@pub.jeanthomas.me>
Date: Thu, 30 Jul 2020 13:52:39 +0000 (+0200)
Subject: Set default value for dram_rst
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=57c90ee54d0458ebe4548716ad1ddc7dd476ef81;p=gram.git

Set default value for dram_rst
---

diff --git a/gram/simulation/simsoctb.v b/gram/simulation/simsoctb.v
index 538d335..de80082 100644
--- a/gram/simulation/simsoctb.v
+++ b/gram/simulation/simsoctb.v
@@ -40,7 +40,7 @@ module simsoctb;
   wire [1:0] dram_dm;
   wire dram_odt;
   wire [1:0] dram_tdqs_n;
-  reg dram_rst;
+  reg dram_rst = 0;
 
   ddr3 #(
     .check_strict_timing(0)