From: lkcl <lkcl@web>
Date: Thu, 20 Apr 2023 15:45:39 +0000 (+0100)
Subject: (no commit message)
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=57ca17a1f84d245aa89efa98a63eb5f4b2d1966f;p=libreriscv.git

---

diff --git a/openpower/sv/av_opcodes.mdwn b/openpower/sv/av_opcodes.mdwn
index 5bcc21faf..a37ff3458 100644
--- a/openpower/sv/av_opcodes.mdwn
+++ b/openpower/sv/av_opcodes.mdwn
@@ -29,8 +29,8 @@ In-advance, the summary of base scalar operations that need to be added is:
 | average-add.  | result = (src1 + src2 + 1) >> 1 |
 | abs-diff      | result = abs (src1-src2) |
 | abs-accumulate| result += abs (src1-src2) |
-| (un)signed min| result = (src1 < src2) ? src1 : src2 |
-| (un)signed max| result = (src1 > src2) ? src1 : src2 |
+| (un)signed min| result = (src1 < src2) ? src1 : src2 [[ls013]] |
+| (un)signed max| result = (src1 > src2) ? src1 : src2 [[ls013]]  |
 | bitwise sel   | (a ? b : c) - use [[sv/bitmanip]] ternary |
 | int/fp move   | covered by REMAP and Pack/Unpack |