From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Thu, 2 Apr 2020 14:00:56 +0000 (+0100)
Subject: add missing info
X-Git-Tag: convert-csv-opcode-to-binary~3002
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=582306378d5e1ac650939dd1f6bc95316d791328;p=libreriscv.git

add missing info
---

diff --git a/openpower/isa/comparefixed.mdwn b/openpower/isa/comparefixed.mdwn
index 600932cc0..b93d1066f 100644
--- a/openpower/isa/comparefixed.mdwn
+++ b/openpower/isa/comparefixed.mdwn
@@ -1,5 +1,7 @@
 # Compare Immediate
 
+D-Form
+
 cmpi BF,L,RA,SI
 
     if L = 0 then a <-  EXTS((RA)[32:63])
@@ -9,8 +11,13 @@ cmpi BF,L,RA,SI
     else                      c <- 0b001
     CR[4*BF+32:4*BF+35] <- c || XER[SO]
 
+Special Registers Altered:
+    CR field BF
+
 # Compare
 
+X-Form
+
 cmp BF,L,RA,RB
 
     if L = 0 then a <-  EXTS((RA)[32:63] )
@@ -22,8 +29,13 @@ cmp BF,L,RA,RB
     else               c <-  0b001
     CR[4*BF+32:4*BF+35] <-  c || XER[SO]
 
+Special Registers Altered:
+    CR field BF
+
 # Compare Logical Immediate
 
+D-Form
+
 cmpli BF,L,RA,UI
 
     if L = 0 then a <- [0]*32 || (RA)[32:63]
@@ -35,6 +47,8 @@ cmpli BF,L,RA,UI
 
 # Compare Logical
 
+X-Form
+
 cmpl BF,L,RA,RB
 
     if L = 0 then a <- [0]*32 || (RA)[32:63]
@@ -46,7 +60,12 @@ cmpl BF,L,RA,RB
     else                c <-  0b001
     CR[4*BF+32:4*BF+35] <- c || XER[SO]
 
-# Compare Ranged Byte X-form
+Special Registers Altered:
+    CR field BF
+
+# Compare Ranged Byte
+
+X-form
 
 cmprb BF,L,RA,RB
 
@@ -68,7 +87,12 @@ cmprb BF,L,RA,RB
     CR[4×BF+34] <- 0b0
     CR[4×BF+35] <- 0b0
 
-# Compare Equal Byte X-form
+Special Registers Altered:
+    CR field BF
+
+# Compare Equal Byte
+
+X-form
 
 cmpeqb BF,RA,RB
 
@@ -88,3 +112,6 @@ cmpeqb BF,RA,RB
     CR[4×BF+34] <- 0b0
     CR[4×BF+35] <- 0b0
 
+Special Registers Altered:
+    CR field BF
+