From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Wed, 12 Jan 2022 20:09:03 +0000 (+0000)
Subject: add allow-overlap option to issuer_verilog.py
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=588b0b1874d9b5c72faaabcf9bb2a555613f6b77;p=soc.git

add allow-overlap option to issuer_verilog.py
---

diff --git a/src/soc/simple/issuer_verilog.py b/src/soc/simple/issuer_verilog.py
index 35ced51d..fdd43dbd 100644
--- a/src/soc/simple/issuer_verilog.py
+++ b/src/soc/simple/issuer_verilog.py
@@ -65,6 +65,11 @@ if __name__ == '__main__':
                         action="store_true",
                         help="generate microwatt-compatible interface",
                         default=False)
+    # allow overlaps in TestIssuer
+    parser.add_argument("--allow-overlap", dest='allow_overlap',
+                        action="store_true",
+                        help="allow overlap in TestIssuer",
+                        default=False)
 
     args = parser.parse_args()
 
@@ -122,6 +127,7 @@ if __name__ == '__main__':
                          svp64=args.svp64,      # enable SVP64
                          microwatt_mmu=args.mmu,         # enable MMU
                          microwatt_compat=args.mwcompat, # microwatt compatible
+                         allow_overlap=args.allow_overlap, # allow overlap
                          units=units,
                          msr_reset=msr_reset)
     #if args.mwcompat: