From: Uros Bizjak <ubizjak@gmail.com>
Date: Tue, 14 Apr 2015 17:17:05 +0000 (+0200)
Subject: i386.h (LEGACY_INT_REG_P): New define.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=58b0b34c9dfac8bec322438688ca4dbd9a690020;p=gcc.git

i386.h (LEGACY_INT_REG_P): New define.

	* config/i386/i386.h (LEGACY_INT_REG_P): New define.
	(LEGACY_INT_REGNO_P): Ditto.
	(GENERAL_REGNO_P): Use LEGACY_INT_REGNO_P.
	(ANY_MASK_REG_P): Remove.
	(BND_REG_P): Rename from ANY_BND_REG_P.
	* config/i386/i386.c (print_reg): Use LEGACY_INT_REG_P to print
	legacy integer registers.  Do not handle MMX_REG_P in a special way.
	Merge 64byte and 32byte SSE handling.

From-SVN: r222100
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index cf7f686de7f..6e1f1450971 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,14 @@
+2015-04-14  Uros Bizjak  <ubizjak@gmail.com>
+
+	* config/i386/i386.h (LEGACY_INT_REG_P): New define.
+	(LEGACY_INT_REGNO_P): Ditto.
+	(GENERAL_REGNO_P): Use LEGACY_INT_REGNO_P.
+	(ANY_MASK_REG_P): Remove.
+	(BND_REG_P): Rename from ANY_BND_REG_P.
+	* config/i386/i386.c (print_reg): Use LEGACY_INT_REG_P to print
+	legacy integer registers.  Do not handle MMX_REG_P in a special way.
+	Merge 64byte and 32byte SSE handling.
+
 2015-04-14  Nick Clifton  <nickc@redhat.com>
 
 	* expr.c (expand_assignment): Force an address offset computation
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 3263656eef3..a607ef441ff 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -15211,7 +15211,7 @@ print_reg (rtx x, int code, FILE *file)
 	      && regno != FPSR_REG
 	      && regno != FPCR_REG);
 
-  if (code == 'w' || MMX_REG_P (x))
+  if (code == 'w')
     code = 2;
   else if (code == 'b')
     code = 1;
@@ -15276,7 +15276,7 @@ print_reg (rtx x, int code, FILE *file)
     case 8:
     case 4:
     case 12:
-      if (! ANY_FP_REG_P (x) && ! ANY_MASK_REG_P (x) && ! ANY_BND_REG_P (x))
+      if (LEGACY_INT_REG_P (x))
 	putc (code == 8 && TARGET_64BIT ? 'r' : 'e', file);
       /* FALLTHRU */
     case 16:
@@ -15295,21 +15295,14 @@ print_reg (rtx x, int code, FILE *file)
       reg = qi_high_reg_name[regno];
       break;
     case 32:
+    case 64:
       if (SSE_REG_P (x))
 	{
 	  gcc_assert (!duplicated);
-	  putc ('y', file);
+	  putc (code == 32 ? 'y' : 'z', file);
 	  fputs (hi_reg_name[regno] + 1, file);
 	  return;
 	}
-    case 64:
-      if (SSE_REG_P (x))
-        {
-          gcc_assert (!duplicated);
-          putc ('z', file);
-          fputs (hi_reg_name[REGNO (x)] + 1, file);
-          return;
-        }
       break;
     default:
       gcc_unreachable ();
diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
index 1e755d3a35e..0dbe7b4561a 100644
--- a/gcc/config/i386/i386.h
+++ b/gcc/config/i386/i386.h
@@ -1446,15 +1446,17 @@ enum reg_class
 #define QI_REG_P(X) (REG_P (X) && QI_REGNO_P (REGNO (X)))
 #define QI_REGNO_P(N) IN_RANGE ((N), AX_REG, BX_REG)
 
-#define GENERAL_REG_P(X) \
-  (REG_P (X) && GENERAL_REGNO_P (REGNO (X)))
+#define GENERAL_REG_P(X) (REG_P (X) && GENERAL_REGNO_P (REGNO (X)))
 #define GENERAL_REGNO_P(N) \
-  (IN_RANGE ((N), AX_REG, SP_REG) || REX_INT_REGNO_P (N))
+  (LEGACY_INT_REGNO_P (N) || REX_INT_REGNO_P (N))
 
 #define ANY_QI_REG_P(X) (REG_P (X) && ANY_QI_REGNO_P (REGNO (X)))
 #define ANY_QI_REGNO_P(N) \
   (TARGET_64BIT ? GENERAL_REGNO_P (N) : QI_REGNO_P (N))
 
+#define LEGACY_INT_REG_P(X) (REG_P (X) && LEGACY_INT_REGNO_P (REGNO (X)))
+#define LEGACY_INT_REGNO_P(N) (IN_RANGE ((N), AX_REG, SP_REG))
+
 #define REX_INT_REG_P(X) (REG_P (X) && REX_INT_REGNO_P (REGNO (X)))
 #define REX_INT_REGNO_P(N) \
   IN_RANGE ((N), FIRST_REX_INT_REG, LAST_REX_INT_REG)
@@ -1487,7 +1489,6 @@ enum reg_class
 
 #define MASK_REG_P(X) (REG_P (X) && MASK_REGNO_P (REGNO (X)))
 #define MASK_REGNO_P(N) IN_RANGE ((N), FIRST_MASK_REG, LAST_MASK_REG)
-#define ANY_MASK_REG_P(X) (REG_P (X) && MASK_REGNO_P (REGNO (X)))
 
 #define SSE_FLOAT_MODE_P(MODE) \
   ((TARGET_SSE && (MODE) == SFmode) || (TARGET_SSE2 && (MODE) == DFmode))
@@ -1504,8 +1505,8 @@ enum reg_class
 #define CC_REG_P(X) (REG_P (X) && CC_REGNO_P (REGNO (X)))
 #define CC_REGNO_P(X) ((X) == FLAGS_REG || (X) == FPSR_REG)
 
+#define BND_REG_P(X) (REG_P (X) && BND_REGNO_P (REGNO (X)))
 #define BND_REGNO_P(N) IN_RANGE ((N), FIRST_BND_REG, LAST_BND_REG)
-#define ANY_BND_REG_P(X) (REG_P (X) && BND_REGNO_P (REGNO (X)))
 
 /* The class value for index registers, and the one for base regs.  */