From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Thu, 18 Apr 2019 09:35:46 +0000 (+0100)
Subject: add in name into plru to help debugging
X-Git-Tag: div_pipeline~2224
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=58d6141eae7040f200411b12c2616ed701f9f8c0;p=soc.git

add in name into plru to help debugging
---

diff --git a/TLB/src/ariane/tlb.py b/TLB/src/ariane/tlb.py
index 7d664cad..3b91b0b8 100644
--- a/TLB/src/ariane/tlb.py
+++ b/TLB/src/ariane/tlb.py
@@ -205,9 +205,10 @@ class PLRU:
                     # lvl0 <=> MSB, lvl1 <=> MSB-1, ...
                     shift = LOG_TLB - lvl;
                     new_idx = Const(~((i >> (shift-1)) & 1), (1, False))
+                    plru_idx = idx_base + (i >> shift)
                     print ("plru", i, lvl, hex(idx_base),
-                                  idx_base + (i >> shift), shift, new_idx)
-                    m.d.sync += plru_tree[idx_base + (i >> shift)].eq(new_idx)
+                                  plru_idx, shift, new_idx)
+                    m.d.sync += plru_tree[plru_idx].eq(new_idx)
 
         # Decode tree to write enable signals
         # Next for-loop basically creates the following logic for e.g.