From: Andrew Zonenberg <azonenberg@drawersteak.com>
Date: Wed, 14 Dec 2016 23:15:38 +0000 (+0800)
Subject: greenpak4: Fixed typo
X-Git-Tag: yosys-0.8~553^2^2~14
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=58da621ac3892bda42e31faa6ac4f02bc9cf3f87;p=yosys.git

greenpak4: Fixed typo
---

diff --git a/techlibs/greenpak4/cells_sim.v b/techlibs/greenpak4/cells_sim.v
index 83727e9b2..d5a06a453 100644
--- a/techlibs/greenpak4/cells_sim.v
+++ b/techlibs/greenpak4/cells_sim.v
@@ -132,7 +132,7 @@ module GP_DAC(input[7:0] DIN, input wire VREF, output reg VOUT);
 
 endmodule
 
-module GP_DCMPREF(output OUT)
+module GP_DCMPREF(output OUT);
 	parameter[7:0] REF_VAL = 8'h00;
 	wire[7:0] OUT = REF_VAL;
 endmodule