From: Eddie Hung <eddie@fpgeh.com>
Date: Wed, 17 Jul 2019 20:26:17 +0000 (-0700)
Subject: Update comment
X-Git-Tag: working-ls180~1039^2~348
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=58e63feae1e950fff839c4261a787d5daf07612e;p=yosys.git

Update comment
---

diff --git a/techlibs/xilinx/synth_xilinx.cc b/techlibs/xilinx/synth_xilinx.cc
index bfce922db..2e2fbbd9d 100644
--- a/techlibs/xilinx/synth_xilinx.cc
+++ b/techlibs/xilinx/synth_xilinx.cc
@@ -284,12 +284,10 @@ struct SynthXilinxPass : public ScriptPass
 
 			run("techmap -map +/cmp2lut.v -D LUT_WIDTH=6");
 
-			// The actual behaviour of the Xilinx DSP is a signed 25x18 multiply
-			// Due to current limitations of mul2dsp, we are actually mapping as a 24x17
-			// unsigned multiply with MSBs set to 1'b0
-
-			if (!nodsp || help_mode)
+			if (!nodsp || help_mode) {
+				// NB: Xilinx multipliers are signed only
 				run("techmap -map +/mul2dsp.v -D DSP_A_MAXWIDTH=25 -D DSP_A_SIGNEDONLY=1 -D DSP_B_MAXWIDTH=18 -D DSP_B_SIGNEDONLY=1 -D DSP_NAME=$__MUL25X18");
+			}
 
 			run("alumacc");
 			run("share");