From: Jakub Jelinek Date: Fri, 6 May 2016 13:14:34 +0000 (+0200) Subject: sse.md (*avx2_pmaddwd, [...]): Use v instead of x in vex or maybe_vex alternatives... X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=58ec1d0e679a0ddd9648d1f4eff810c9973bede0;p=gcc.git sse.md (*avx2_pmaddwd, [...]): Use v instead of x in vex or maybe_vex alternatives... * config/i386/sse.md (*avx2_pmaddwd, *sse2_pmaddwd): Use v instead of x in vex or maybe_vex alternatives, use maybe_evex instead of vex in prefix. * gcc.target/i386/avx512bw-vpmaddwd-3.c: New test. From-SVN: r235971 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index d22d7105795..14ca88749af 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,9 @@ 2016-05-06 Jakub Jelinek + * config/i386/sse.md (*avx2_pmaddwd, *sse2_pmaddwd): Use + v instead of x in vex or maybe_vex alternatives, use + maybe_evex instead of vex in prefix. + * config/i386/sse.md (*vec_extractv4sf_0, *sse4_1_extractps, *vec_extractv4sf_mem, vec_extract_lo_v16hi, vec_extract_hi_v16hi, vec_extract_lo_v32qi, vec_extract_hi_v32qi): Use v instead of x diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 8b02e841873..b7b8966d294 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -9817,19 +9817,19 @@ "ix86_fixup_binary_operands_no_copy (MULT, V16HImode, operands);") (define_insn "*avx2_pmaddwd" - [(set (match_operand:V8SI 0 "register_operand" "=x") + [(set (match_operand:V8SI 0 "register_operand" "=x,v") (plus:V8SI (mult:V8SI (sign_extend:V8SI (vec_select:V8HI - (match_operand:V16HI 1 "nonimmediate_operand" "%x") + (match_operand:V16HI 1 "nonimmediate_operand" "%x,v") (parallel [(const_int 0) (const_int 2) (const_int 4) (const_int 6) (const_int 8) (const_int 10) (const_int 12) (const_int 14)]))) (sign_extend:V8SI (vec_select:V8HI - (match_operand:V16HI 2 "nonimmediate_operand" "xm") + (match_operand:V16HI 2 "nonimmediate_operand" "xm,vm") (parallel [(const_int 0) (const_int 2) (const_int 4) (const_int 6) (const_int 8) (const_int 10) @@ -9850,7 +9850,8 @@ "TARGET_AVX2 && ix86_binary_operator_ok (MULT, V16HImode, operands)" "vpmaddwd\t{%2, %1, %0|%0, %1, %2}" [(set_attr "type" "sseiadd") - (set_attr "prefix" "vex") + (set_attr "isa" "*,avx512bw") + (set_attr "prefix" "vex,evex") (set_attr "mode" "OI")]) (define_expand "sse2_pmaddwd" @@ -9880,17 +9881,17 @@ "ix86_fixup_binary_operands_no_copy (MULT, V8HImode, operands);") (define_insn "*sse2_pmaddwd" - [(set (match_operand:V4SI 0 "register_operand" "=x,x") + [(set (match_operand:V4SI 0 "register_operand" "=x,x,v") (plus:V4SI (mult:V4SI (sign_extend:V4SI (vec_select:V4HI - (match_operand:V8HI 1 "vector_operand" "%0,x") + (match_operand:V8HI 1 "vector_operand" "%0,x,v") (parallel [(const_int 0) (const_int 2) (const_int 4) (const_int 6)]))) (sign_extend:V4SI (vec_select:V4HI - (match_operand:V8HI 2 "vector_operand" "xBm,xm") + (match_operand:V8HI 2 "vector_operand" "xBm,xm,vm") (parallel [(const_int 0) (const_int 2) (const_int 4) (const_int 6)])))) (mult:V4SI @@ -9905,12 +9906,13 @@ "TARGET_SSE2 && ix86_binary_operator_ok (MULT, V8HImode, operands)" "@ pmaddwd\t{%2, %0|%0, %2} + vpmaddwd\t{%2, %1, %0|%0, %1, %2} vpmaddwd\t{%2, %1, %0|%0, %1, %2}" - [(set_attr "isa" "noavx,avx") + [(set_attr "isa" "noavx,avx,avx512bw") (set_attr "type" "sseiadd") (set_attr "atom_unit" "simul") - (set_attr "prefix_data16" "1,*") - (set_attr "prefix" "orig,vex") + (set_attr "prefix_data16" "1,*,*") + (set_attr "prefix" "orig,vex,evex") (set_attr "mode" "TI")]) (define_insn "avx512dq_mul3" diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 510e3feeeea..b7a06a27988 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2016-05-06 Jakub Jelinek + + * gcc.target/i386/avx512bw-vpmaddwd-3.c: New test. + 2016-05-06 Yuri Rumyantsev PR debug/70935 diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpmaddwd-3.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpmaddwd-3.c new file mode 100644 index 00000000000..d0c7c38e195 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpmaddwd-3.c @@ -0,0 +1,24 @@ +/* { dg-do assemble { target { avx512bw && { avx512vl && { ! ia32 } } } } } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl" } */ + +#include + +void +f1 (__m128i x, __m128i y) +{ + register __m128i a __asm ("xmm16"), b __asm ("xmm17"); + a = x; b = y; + asm volatile ("" : "+v" (a), "+v" (b)); + a = _mm_madd_epi16 (a, b); + asm volatile ("" : "+v" (a)); +} + +void +f2 (__m256i x, __m256i y) +{ + register __m256i a __asm ("xmm16"), b __asm ("xmm17"); + a = x; b = y; + asm volatile ("" : "+v" (a), "+v" (b)); + a = _mm256_madd_epi16 (a, b); + asm volatile ("" : "+v" (a)); +}