From: lkcl <lkcl@web>
Date: Fri, 2 Jul 2021 22:31:21 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: DRAFT_SVP64_0_1~666
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=591a618fc86322991b0aa1c19e6db692bd03147b;p=libreriscv.git

---

diff --git a/openpower/sv/remap.mdwn b/openpower/sv/remap.mdwn
index 966a98138..82a28f558 100644
--- a/openpower/sv/remap.mdwn
+++ b/openpower/sv/remap.mdwn
@@ -185,6 +185,22 @@ setting VL=64, using an extra dimension on the SHAPE0 and SHAPE1 SPRs,
 and applying a rotating 1D SHAPE SPR of xdim=16 to f8 in order to get
 it to apply four times to compute the four columns worth of vectors.
 
+# Warshall transitive closure algorithm
+
+> Just a note:  interpreting + as 'or', and * as 'and',
+> operating on Boolean matrices, 
+> and having result, X, and Y be the exact same matrix,
+> updated while being used,
+> gives the traditional Warshall transitive-closure
+> algorithm, if the loops are nested exactly in thie order.
+
+this can be done with the ternary instruction which has
+an in-place triple boolean input:
+
+    RT = RT | (RA & RB)
+
+and also has a CR Field variant of the same
+
 # SUBVL Remap
 
 Remapping even of SUBVL (vec2/3/4) elements is permitted, as if the