From: Denis Chertykov <chertykov@gmail.com>
Date: Tue, 19 Jul 2016 06:47:23 +0000 (+0300)
Subject: 	Update PC when simulate break instruction.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=59f48f5a45d2300da401f1fccab31ba436217469;p=binutils-gdb.git

	Update PC when simulate break instruction.

	PR target/ 19401
	* avr/interp.c (step_once): Pass break instruction address to
	sim_engine_halt function which writes that to PC. Remove code that
	follows that function call as it is unreachable.
---

diff --git a/sim/ChangeLog b/sim/ChangeLog
index 76c384d1a1b..d7cc92c1bb6 100644
--- a/sim/ChangeLog
+++ b/sim/ChangeLog
@@ -1,3 +1,10 @@
+2016-07-19  Pitchumani Sivanupandi  <pitchumani.s@atmel.com>
+
+	PR target/ 19401
+	* avr/interp.c (step_once): Pass break instruction address to
+	sim_engine_halt function which writes that to PC. Remove code that
+	follows that function call as it is unreachable.
+
 2016-02-03  Maciej W. Rozycki  <macro@linux-mips.org>
 
 	* MAINTAINERS (Past sim maintainers): Add Thiemo Seufer.
diff --git a/sim/avr/interp.c b/sim/avr/interp.c
index 31a99407bd2..fcce9b298d1 100644
--- a/sim/avr/interp.c
+++ b/sim/avr/interp.c
@@ -911,8 +911,7 @@ step_once (SIM_CPU *cpu)
 
       case OP_break:
 	/* Stop on this address.  */
-	sim_engine_halt (CPU_STATE (cpu), cpu, NULL, cpu->pc, sim_stopped, SIM_SIGTRAP);
-	cpu->pc = ipc;
+	sim_engine_halt (CPU_STATE (cpu), cpu, NULL, ipc, sim_stopped, SIM_SIGTRAP);
 	break;
 
       case OP_bld: