From: Tim 'mithro' Ansell <me@mith.ro>
Date: Sun, 12 Apr 2020 01:26:15 +0000 (-0700)
Subject: litex_sim: Rework Makefiles to put output files in gateware directory.
X-Git-Tag: 24jan2021_ls180~424^2~17
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=5a0bb6ee017f78a38a314747d55a95dbe10622c3;p=litex.git

litex_sim: Rework Makefiles to put output files in gateware directory.
---

diff --git a/litex/build/sim/core/Makefile b/litex/build/sim/core/Makefile
index 422baacd..047423ca 100644
--- a/litex/build/sim/core/Makefile
+++ b/litex/build/sim/core/Makefile
@@ -29,11 +29,11 @@ all: modules sim
 mkdir:
 	mkdir -p $(OBJ_DIR)
 
-$(OBJS_SIM): %.o: $(SRC_DIR)/%.c
+$(OBJS_SIM): %.o: $(SRC_DIR)/%.c | mkdir
 	$(CC) -c $(CFLAGS) -o $(OBJ_DIR)/$@ $<
 
 .PHONY: sim
-sim: mkdir $(OBJS_SIM)
+sim: $(OBJS_SIM) | mkdir
 	verilator -Wno-fatal -O3 $(CC_SRCS) --top-module dut --exe \
 		-DPRINTF_COND=0 \
 		$(SRCS_SIM_CPP) $(OBJS_SIM) \
@@ -51,8 +51,9 @@ sim: mkdir $(OBJS_SIM)
 	make -j -C $(OBJ_DIR) -f Vdut.mk Vdut
 
 .PHONY: modules
-modules: mkdir
-	$(MAKE) -C $(MOD_DIR)
+modules:
+	mkdir modules
+	$(MAKE) -C modules -f $(MOD_DIR)/Makefile
 
 .PHONY: clean
 clean:
diff --git a/litex/build/sim/core/modules/Makefile b/litex/build/sim/core/modules/Makefile
index a0b721c5..c7a35784 100644
--- a/litex/build/sim/core/modules/Makefile
+++ b/litex/build/sim/core/modules/Makefile
@@ -1,11 +1,13 @@
+include ../variables.mak
 MODULES = xgmii_ethernet ethernet serial2console serial2tcp clocker
-SHROBJS = $(MODULES:=.so)
 
 .PHONY: $(MODULES)
 all: $(MODULES)
 
 $(MODULES): %:
-	$(MAKE) -C $@
+	mkdir -p $@
+	$(MAKE) MOD=$@ -C $@ -f $(SRC_DIR)/modules/$@/Makefile
+	cp $@/$@.so $@.so
 
 .PHONY: clean
 clean:
diff --git a/litex/build/sim/core/modules/clocker/Makefile b/litex/build/sim/core/modules/clocker/Makefile
index 3fd45b45..0c69b5b9 100644
--- a/litex/build/sim/core/modules/clocker/Makefile
+++ b/litex/build/sim/core/modules/clocker/Makefile
@@ -1,5 +1,2 @@
-include ../variables.mak
-
-all: $(OBJ_DIR)/clocker.so
-
-include ../rules.mak
+include ../../variables.mak
+include $(SRC_DIR)/modules/rules.mak
diff --git a/litex/build/sim/core/modules/ethernet/Makefile b/litex/build/sim/core/modules/ethernet/Makefile
index d29bf1c2..461ed86b 100644
--- a/litex/build/sim/core/modules/ethernet/Makefile
+++ b/litex/build/sim/core/modules/ethernet/Makefile
@@ -1,22 +1,20 @@
-include ../variables.mak
-CFLAGS += -Itapcfg/src/include
+include ../../variables.mak
 UNAME_S := $(shell uname -s)
 
-all: $(OBJ_DIR)/ethernet.so
+include $(SRC_DIR)/modules/rules.mak
 
-include ../rules.mak
+CFLAGS += -I$(MOD_SRC_DIR)/tapcfg/src/include
+OBJS = $(MOD).o tapcfg.o taplog.o
 
-OBJS = $(addprefix $(OBJ_DIR)/, ethernet.o tapcfg.o taplog.o)
-
-$(OBJ_DIR)/ethernet.so: $(OBJS)
+$(MOD).so: $(OBJS)
 ifeq ($(UNAME_S),Darwin)
 	$(CC) $(LDFLAGS) -o $@ $^
 else
 	$(CC) $(LDFLAGS) -Wl,-soname,$@ -o $@ $^
 endif
 
-$(OBJ_DIR)/tapcfg.o: tapcfg/src/lib/tapcfg.c
+tapcfg.o: $(MOD_SRC_DIR)/tapcfg/src/lib/tapcfg.c
 	$(CC) $(CFLAGS) -c -o $@ $<
 
-$(OBJ_DIR)/taplog.o: tapcfg/src/lib/taplog.c
+taplog.o: $(MOD_SRC_DIR)/tapcfg/src/lib/taplog.c
 	$(CC) $(CFLAGS) -c -o $@ $<
diff --git a/litex/build/sim/core/modules/jtagremote/Makefile b/litex/build/sim/core/modules/jtagremote/Makefile
index 950d4914..0c69b5b9 100644
--- a/litex/build/sim/core/modules/jtagremote/Makefile
+++ b/litex/build/sim/core/modules/jtagremote/Makefile
@@ -1,5 +1,2 @@
-include ../variables.mak
-
-all: $(OBJ_DIR)/jtagremote.so
-
-include ../rules.mak
+include ../../variables.mak
+include $(SRC_DIR)/modules/rules.mak
diff --git a/litex/build/sim/core/modules/rules.mak b/litex/build/sim/core/modules/rules.mak
index 62ff2428..0c186727 100644
--- a/litex/build/sim/core/modules/rules.mak
+++ b/litex/build/sim/core/modules/rules.mak
@@ -1,9 +1,23 @@
+CC ?= gcc
 UNAME_S := $(shell uname -s)
 
-$(OBJ_DIR)/%.o: %.c
-	$(CC) -c $(CFLAGS) -I../.. -o $@ $<
+ifeq ($(UNAME_S),Darwin)
+    CFLAGS += -I/usr/local/include/
+    LDFLAGS += -L/usr/local/lib -ljson-c
+    CFLAGS += -Wall -O3 -ggdb -fPIC
+else
+    CFLAGS += -Wall -O3 -ggdb -fPIC -Werror
+endif
+LDFLAGS += -levent -shared -fPIC
+
+MOD_SRC_DIR=$(SRC_DIR)/modules/$(MOD)
+
+all: $(MOD).so
+
+%.o: $(MOD_SRC_DIR)/%.c
+	$(CC) -c $(CFLAGS) -I$(MOD_SRC_DIR)/../.. -o $@ $<
 
-$(OBJ_DIR)/%.so: $(OBJ_DIR)/%.o
+%.so: %.o
 ifeq ($(UNAME_S),Darwin)
 	$(CC) $(LDFLAGS) -o $@ $^
 else
@@ -12,4 +26,4 @@ endif
 
 .PHONY: clean
 clean:
-	rm -f $(OBJ_DIR)/*.o $(OBJ_DIR)/*.so
+	rm -f *.o *.so
diff --git a/litex/build/sim/core/modules/serial2console/Makefile b/litex/build/sim/core/modules/serial2console/Makefile
index 7d752baa..0c69b5b9 100644
--- a/litex/build/sim/core/modules/serial2console/Makefile
+++ b/litex/build/sim/core/modules/serial2console/Makefile
@@ -1,5 +1,2 @@
-include ../variables.mak
-
-all: $(OBJ_DIR)/serial2console.so
-
-include ../rules.mak
+include ../../variables.mak
+include $(SRC_DIR)/modules/rules.mak
diff --git a/litex/build/sim/core/modules/serial2tcp/Makefile b/litex/build/sim/core/modules/serial2tcp/Makefile
index 40364449..0c69b5b9 100644
--- a/litex/build/sim/core/modules/serial2tcp/Makefile
+++ b/litex/build/sim/core/modules/serial2tcp/Makefile
@@ -1,5 +1,2 @@
-include ../variables.mak
-
-all: $(OBJ_DIR)/serial2tcp.so
-
-include ../rules.mak
+include ../../variables.mak
+include $(SRC_DIR)/modules/rules.mak
diff --git a/litex/build/sim/core/modules/variables.mak b/litex/build/sim/core/modules/variables.mak
deleted file mode 100644
index dee2a983..00000000
--- a/litex/build/sim/core/modules/variables.mak
+++ /dev/null
@@ -1,13 +0,0 @@
-CC ?= gcc
-UNAME_S := $(shell uname -s)
-
-ifeq ($(UNAME_S),Darwin)
-    CFLAGS += -I/usr/local/include/
-    LDFLAGS += -L/usr/local/lib -ljson-c
-    CFLAGS += -Wall -O3 -ggdb -fPIC
-else
-    CFLAGS += -Wall -O3 -ggdb -fPIC -Werror
-endif
-LDFLAGS += -levent -shared -fPIC
-
-OBJ_DIR ?= .
diff --git a/litex/build/sim/core/modules/xgmii_ethernet/Makefile b/litex/build/sim/core/modules/xgmii_ethernet/Makefile
index ece1f013..461ed86b 100644
--- a/litex/build/sim/core/modules/xgmii_ethernet/Makefile
+++ b/litex/build/sim/core/modules/xgmii_ethernet/Makefile
@@ -1,22 +1,20 @@
-include ../variables.mak
-CFLAGS += -Itapcfg/src/include
+include ../../variables.mak
 UNAME_S := $(shell uname -s)
 
-all: $(OBJ_DIR)/xgmii_ethernet.so
+include $(SRC_DIR)/modules/rules.mak
 
-include ../rules.mak
+CFLAGS += -I$(MOD_SRC_DIR)/tapcfg/src/include
+OBJS = $(MOD).o tapcfg.o taplog.o
 
-OBJS = $(addprefix $(OBJ_DIR)/, xgmii_ethernet.o tapcfg.o taplog.o)
-
-$(OBJ_DIR)/xgmii_ethernet.so: $(OBJS)
+$(MOD).so: $(OBJS)
 ifeq ($(UNAME_S),Darwin)
 	$(CC) $(LDFLAGS) -o $@ $^
 else
 	$(CC) $(LDFLAGS) -Wl,-soname,$@ -o $@ $^
 endif
 
-$(OBJ_DIR)/tapcfg.o: tapcfg/src/lib/tapcfg.c
+tapcfg.o: $(MOD_SRC_DIR)/tapcfg/src/lib/tapcfg.c
 	$(CC) $(CFLAGS) -c -o $@ $<
 
-$(OBJ_DIR)/taplog.o: tapcfg/src/lib/taplog.c
+taplog.o: $(MOD_SRC_DIR)/tapcfg/src/lib/taplog.c
 	$(CC) $(CFLAGS) -c -o $@ $<
diff --git a/litex/build/sim/verilator.py b/litex/build/sim/verilator.py
index 682192a2..f068d08d 100644
--- a/litex/build/sim/verilator.py
+++ b/litex/build/sim/verilator.py
@@ -125,7 +125,6 @@ def _build_sim(build_name, sources, threads, coverage, opt_level="O3", trace_fst
     build_script_contents = """\
 rm -rf obj_dir/
 make -C . -f {} {} {} {} {} {}
-mkdir -p modules && cp obj_dir/*.so modules
 """.format(makefile,
     "CC_SRCS=\"{}\"".format("".join(cc_srcs)),
     "THREADS={}".format(threads) if int(threads) > 1 else "",
@@ -217,4 +216,4 @@ class SimVerilatorToolchain:
         os.chdir("../../")
 
         if build:
-            return top_output.ns
\ No newline at end of file
+            return top_output.ns