From: Marek Olšák Date: Thu, 11 Apr 2013 13:29:41 +0000 (+0200) Subject: r600g: cleanup MSAA texture support checking X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=5a3fac4d2667b5d46058564151142fec158f5f82;p=mesa.git r600g: cleanup MSAA texture support checking Reviewed-by: Alex Deucher --- diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c index 4eb976849c5..f49c5952104 100644 --- a/src/gallium/drivers/r600/evergreen_state.c +++ b/src/gallium/drivers/r600/evergreen_state.c @@ -1219,7 +1219,7 @@ evergreen_create_sampler_view_custom(struct pipe_context *ctx, view->tex_resource_words[2] = (surflevel[0].offset + r600_resource_va(ctx->screen, texture)) >> 8; /* TEX_RESOURCE_WORD3.MIP_ADDRESS */ - if (texture->nr_samples > 1 && rscreen->msaa_texture_support == MSAA_TEXTURE_COMPRESSED) { + if (texture->nr_samples > 1 && rscreen->has_compressed_msaa_texturing) { if (tmp->is_depth) { /* disable FMASK (0 = disabled) */ view->tex_resource_words[3] = 0; @@ -3537,21 +3537,13 @@ void *evergreen_create_resolve_blend(struct r600_context *rctx) void *evergreen_create_decompress_blend(struct r600_context *rctx) { struct pipe_blend_state blend; + unsigned mode = rctx->screen->has_compressed_msaa_texturing ? + V_028808_CB_FMASK_DECOMPRESS : V_028808_CB_DECOMPRESS; memset(&blend, 0, sizeof(blend)); blend.independent_blend_enable = true; blend.rt[0].colormask = 0xf; - return evergreen_create_blend_state_mode(&rctx->context, &blend, V_028808_CB_DECOMPRESS); -} - -void *evergreen_create_fmask_decompress_blend(struct r600_context *rctx) -{ - struct pipe_blend_state blend; - - memset(&blend, 0, sizeof(blend)); - blend.independent_blend_enable = true; - blend.rt[0].colormask = 0xf; - return evergreen_create_blend_state_mode(&rctx->context, &blend, V_028808_CB_FMASK_DECOMPRESS); + return evergreen_create_blend_state_mode(&rctx->context, &blend, mode); } void *evergreen_create_db_flush_dsa(struct r600_context *rctx) diff --git a/src/gallium/drivers/r600/r600_asm.c b/src/gallium/drivers/r600/r600_asm.c index df0376ad11e..08fe24e8680 100644 --- a/src/gallium/drivers/r600/r600_asm.c +++ b/src/gallium/drivers/r600/r600_asm.c @@ -126,7 +126,7 @@ static unsigned stack_entry_size(enum radeon_family chip) { void r600_bytecode_init(struct r600_bytecode *bc, enum chip_class chip_class, enum radeon_family family, - enum r600_msaa_texture_mode msaa_texture_mode) + bool has_compressed_msaa_texturing) { static unsigned next_shader_id = 0; @@ -143,7 +143,7 @@ void r600_bytecode_init(struct r600_bytecode *bc, LIST_INITHEAD(&bc->cf); bc->chip_class = chip_class; - bc->msaa_texture_mode = msaa_texture_mode; + bc->has_compressed_msaa_texturing = has_compressed_msaa_texturing; bc->stack.entry_size = stack_entry_size(family); } @@ -2287,7 +2287,7 @@ void *r600_create_vertex_fetch_shader(struct pipe_context *ctx, memset(&bc, 0, sizeof(bc)); r600_bytecode_init(&bc, rctx->chip_class, rctx->family, - rctx->screen->msaa_texture_support); + rctx->screen->has_compressed_msaa_texturing); bc.isa = rctx->isa; diff --git a/src/gallium/drivers/r600/r600_asm.h b/src/gallium/drivers/r600/r600_asm.h index bbebaec84cc..6ab5dacec5d 100644 --- a/src/gallium/drivers/r600/r600_asm.h +++ b/src/gallium/drivers/r600/r600_asm.h @@ -195,7 +195,7 @@ struct r600_stack_info { struct r600_bytecode { enum chip_class chip_class; - enum r600_msaa_texture_mode msaa_texture_mode; + bool has_compressed_msaa_texturing; int type; struct list_head cf; struct r600_bytecode_cf *cf_last; @@ -225,7 +225,7 @@ int eg_bytecode_cf_build(struct r600_bytecode *bc, struct r600_bytecode_cf *cf); void r600_bytecode_init(struct r600_bytecode *bc, enum chip_class chip_class, enum radeon_family family, - enum r600_msaa_texture_mode msaa_texture_mode); + bool has_compressed_msaa_texturing); void r600_bytecode_clear(struct r600_bytecode *bc); int r600_bytecode_add_alu(struct r600_bytecode *bc, const struct r600_bytecode_alu *alu); diff --git a/src/gallium/drivers/r600/r600_blit.c b/src/gallium/drivers/r600/r600_blit.c index 7d32eef89ee..058bf819b8a 100644 --- a/src/gallium/drivers/r600/r600_blit.c +++ b/src/gallium/drivers/r600/r600_blit.c @@ -290,25 +290,10 @@ static void r600_blit_decompress_color(struct pipe_context *ctx, { struct r600_context *rctx = (struct r600_context *)ctx; unsigned layer, level, checked_last_layer, max_layer; - void *blend_decompress; if (!rtex->dirty_level_mask) return; - switch (rctx->screen->msaa_texture_support) { - case MSAA_TEXTURE_DECOMPRESSED: - blend_decompress = rctx->custom_blend_decompress; - break; - case MSAA_TEXTURE_COMPRESSED: - blend_decompress = rctx->custom_blend_fmask_decompress; - break; - case MSAA_TEXTURE_SAMPLE_ZERO: - default: - /* Nothing to do. */ - rtex->dirty_level_mask = 0; - return; - } - for (level = first_level; level <= last_level; level++) { if (!(rtex->dirty_level_mask & (1 << level))) continue; @@ -328,7 +313,7 @@ static void r600_blit_decompress_color(struct pipe_context *ctx, cbsurf = ctx->create_surface(ctx, &rtex->resource.b.b, &surf_tmpl); r600_blitter_begin(ctx, R600_DECOMPRESS); - util_blitter_custom_color(rctx->blitter, cbsurf, blend_decompress); + util_blitter_custom_color(rctx->blitter, cbsurf, rctx->custom_blend_decompress); r600_blitter_end(ctx); pipe_surface_reference(&cbsurf, NULL); @@ -578,7 +563,6 @@ static void r600_resource_copy_region(struct pipe_context *ctx, struct pipe_sampler_view src_templ, *src_view; unsigned dst_width, dst_height, src_width0, src_height0, src_widthFL, src_heightFL; struct pipe_box sbox, dstbox; - bool copy_all_samples; /* Handle buffers first. */ if (dst->target == PIPE_BUFFER && src->target == PIPE_BUFFER) { @@ -690,8 +674,6 @@ static void r600_resource_copy_region(struct pipe_context *ctx, src_widthFL, src_heightFL); } - copy_all_samples = rctx->screen->msaa_texture_support != MSAA_TEXTURE_SAMPLE_ZERO; - u_box_3d(dstx, dsty, dstz, abs(src_box->width), abs(src_box->height), abs(src_box->depth), &dstbox); @@ -700,7 +682,7 @@ static void r600_resource_copy_region(struct pipe_context *ctx, util_blitter_blit_generic(rctx->blitter, dst_view, &dstbox, src_view, src_box, src_width0, src_height0, PIPE_MASK_RGBAZS, PIPE_TEX_FILTER_NEAREST, NULL, - copy_all_samples); + TRUE); r600_blitter_end(ctx); pipe_surface_reference(&dst_view, NULL); diff --git a/src/gallium/drivers/r600/r600_pipe.c b/src/gallium/drivers/r600/r600_pipe.c index efb45010a19..71f555b0eab 100644 --- a/src/gallium/drivers/r600/r600_pipe.c +++ b/src/gallium/drivers/r600/r600_pipe.c @@ -333,9 +333,6 @@ static void r600_destroy_context(struct pipe_context *context) if (rctx->custom_blend_decompress) { rctx->context.delete_blend_state(&rctx->context, rctx->custom_blend_decompress); } - if (rctx->custom_blend_fmask_decompress) { - rctx->context.delete_blend_state(&rctx->context, rctx->custom_blend_fmask_decompress); - } util_unreference_framebuffer_state(&rctx->framebuffer.state); if (rctx->blitter) { @@ -430,7 +427,6 @@ static struct pipe_context *r600_create_context(struct pipe_screen *screen, void rctx->custom_dsa_flush = evergreen_create_db_flush_dsa(rctx); rctx->custom_blend_resolve = evergreen_create_resolve_blend(rctx); rctx->custom_blend_decompress = evergreen_create_decompress_blend(rctx); - rctx->custom_blend_fmask_decompress = evergreen_create_fmask_decompress_blend(rctx); rctx->has_vertex_cache = !(rctx->family == CHIP_CEDAR || rctx->family == CHIP_PALM || rctx->family == CHIP_SUMO || @@ -591,7 +587,9 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param) case PIPE_CAP_TEXTURE_BUFFER_OBJECTS: case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER: case PIPE_CAP_QUERY_PIPELINE_STATISTICS: + case PIPE_CAP_TEXTURE_MULTISAMPLE: return 1; + case PIPE_CAP_TGSI_TEXCOORD: return 0; @@ -610,9 +608,6 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param) case PIPE_CAP_GLSL_FEATURE_LEVEL: return 140; - case PIPE_CAP_TEXTURE_MULTISAMPLE: - return rscreen->msaa_texture_support != MSAA_TEXTURE_SAMPLE_ZERO; - /* Supported except the original R600. */ case PIPE_CAP_INDEP_BLEND_ENABLE: case PIPE_CAP_INDEP_BLEND_FUNC: @@ -1261,22 +1256,19 @@ struct pipe_screen *r600_screen_create(struct radeon_winsys *ws) case R600: case R700: rscreen->has_msaa = rscreen->info.drm_minor >= 22; - rscreen->msaa_texture_support = MSAA_TEXTURE_DECOMPRESSED; + rscreen->has_compressed_msaa_texturing = false; break; case EVERGREEN: rscreen->has_msaa = rscreen->info.drm_minor >= 19; - rscreen->msaa_texture_support = - rscreen->info.drm_minor >= 24 ? MSAA_TEXTURE_COMPRESSED : - MSAA_TEXTURE_DECOMPRESSED; + rscreen->has_compressed_msaa_texturing = rscreen->info.drm_minor >= 24; break; case CAYMAN: rscreen->has_msaa = rscreen->info.drm_minor >= 19; - rscreen->msaa_texture_support = MSAA_TEXTURE_COMPRESSED; + rscreen->has_compressed_msaa_texturing = true; break; default: rscreen->has_msaa = FALSE; - rscreen->msaa_texture_support = 0; - break; + rscreen->has_compressed_msaa_texturing = false; } rscreen->has_cp_dma = rscreen->info.drm_minor >= 27 && diff --git a/src/gallium/drivers/r600/r600_pipe.h b/src/gallium/drivers/r600/r600_pipe.h index bb4e429aeb2..2a81434155e 100644 --- a/src/gallium/drivers/r600/r600_pipe.h +++ b/src/gallium/drivers/r600/r600_pipe.h @@ -216,22 +216,6 @@ struct r600_pipe_fences { pipe_mutex mutex; }; -enum r600_msaa_texture_mode { - /* If the hw can fetch the first sample only (no decompression available). - * This means MSAA texturing is not fully implemented. */ - MSAA_TEXTURE_SAMPLE_ZERO, - - /* If the hw can fetch decompressed MSAA textures. - * Supported families: R600, R700, Evergreen. - * Cayman cannot use this, because it cannot do the decompression. */ - MSAA_TEXTURE_DECOMPRESSED, - - /* If the hw can fetch compressed MSAA textures, which means shaders can - * read resolved FMASK. This yields the best performance. - * Supported families: Evergreen, Cayman. */ - MSAA_TEXTURE_COMPRESSED -}; - typedef boolean (*r600g_dma_blit_t)(struct pipe_context *ctx, struct pipe_resource *dst, unsigned dst_level, @@ -282,7 +266,7 @@ struct r600_screen { bool has_streamout; bool has_msaa; bool has_cp_dma; - enum r600_msaa_texture_mode msaa_texture_support; + bool has_compressed_msaa_texturing; struct r600_tiling_info tiling_info; struct r600_pipe_fences fences; @@ -561,7 +545,6 @@ struct r600_context { void *custom_dsa_flush; void *custom_blend_resolve; void *custom_blend_decompress; - void *custom_blend_fmask_decompress; /* With rasterizer discard, there doesn't have to be a pixel shader. * In that case, we bind this one: */ void *dummy_pixel_shader; @@ -713,7 +696,6 @@ void evergreen_update_vs_state(struct pipe_context *ctx, struct r600_pipe_shader void *evergreen_create_db_flush_dsa(struct r600_context *rctx); void *evergreen_create_resolve_blend(struct r600_context *rctx); void *evergreen_create_decompress_blend(struct r600_context *rctx); -void *evergreen_create_fmask_decompress_blend(struct r600_context *rctx); boolean evergreen_is_format_supported(struct pipe_screen *screen, enum pipe_format format, enum pipe_texture_target target, diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c index 4416ef0fde2..4e5af708bd7 100644 --- a/src/gallium/drivers/r600/r600_shader.c +++ b/src/gallium/drivers/r600/r600_shader.c @@ -962,7 +962,7 @@ static int r600_shader_from_tgsi(struct r600_screen *rscreen, ctx.native_integers = true; r600_bytecode_init(ctx.bc, rscreen->chip_class, rscreen->family, - rscreen->msaa_texture_support); + rscreen->has_compressed_msaa_texturing); ctx.tokens = tokens; tgsi_scan_shader(tokens, &ctx.info); shader->indirect_files = ctx.info.indirect_files; @@ -3794,10 +3794,11 @@ static int tgsi_tex(struct r600_shader_ctx *ctx) unsigned src_gpr; int r, i, j; int opcode; - bool read_compressed_msaa = ctx->bc->msaa_texture_mode == MSAA_TEXTURE_COMPRESSED && + bool read_compressed_msaa = ctx->bc->has_compressed_msaa_texturing && inst->Instruction.Opcode == TGSI_OPCODE_TXF && (inst->Texture.Texture == TGSI_TEXTURE_2D_MSAA || inst->Texture.Texture == TGSI_TEXTURE_2D_ARRAY_MSAA); + /* Texture fetch instructions can only use gprs as source. * Also they cannot negate the source or take the absolute value */ const boolean src_requires_loading = (inst->Instruction.Opcode != TGSI_OPCODE_TXQ_LZ &&