From: Brian Paul Date: Sat, 29 Sep 2012 14:47:55 +0000 (-0600) Subject: radeon/r200: make radeon_context subclass of gl_context X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=5a63634a136caa905e7a1fa5da8fe5dc9f26add5;p=mesa.git radeon/r200: make radeon_context subclass of gl_context radeon_context now contains a gl_context, rather than a pointer to one. This will allow some minor core Mesa clean-up. --- diff --git a/src/mesa/drivers/dri/r200/r200_blit.c b/src/mesa/drivers/dri/r200/r200_blit.c index e3124b312f4..a6a1a3fa65c 100644 --- a/src/mesa/drivers/dri/r200/r200_blit.c +++ b/src/mesa/drivers/dri/r200/r200_blit.c @@ -525,7 +525,7 @@ unsigned r200_blit(struct gl_context *ctx, } /* Flush is needed to make sure that source buffer has correct data */ - radeonFlush(r200->radeon.glCtx); + radeonFlush(&r200->radeon.glCtx); rcommonEnsureCmdBufSpace(&r200->radeon, 102, __FUNCTION__); diff --git a/src/mesa/drivers/dri/r200/r200_cmdbuf.c b/src/mesa/drivers/dri/r200/r200_cmdbuf.c index d911b45efb4..aa058b39029 100644 --- a/src/mesa/drivers/dri/r200/r200_cmdbuf.c +++ b/src/mesa/drivers/dri/r200/r200_cmdbuf.c @@ -56,7 +56,7 @@ void r200SetUpAtomList( r200ContextPtr rmesa ) { int i, mtu; - mtu = rmesa->radeon.glCtx->Const.MaxTextureUnits; + mtu = rmesa->radeon.glCtx.Const.MaxTextureUnits; make_empty_list(&rmesa->radeon.hw.atomlist); rmesa->radeon.hw.atomlist.name = "atom-list"; @@ -201,7 +201,7 @@ GLushort *r200AllocEltsOpenEnded( r200ContextPtr rmesa, retval = rmesa->radeon.tcl.elt_dma_bo->ptr + rmesa->radeon.tcl.elt_dma_offset; assert(!rmesa->radeon.dma.flush); - rmesa->radeon.glCtx->Driver.NeedFlush |= FLUSH_STORED_VERTICES; + rmesa->radeon.glCtx.Driver.NeedFlush |= FLUSH_STORED_VERTICES; rmesa->radeon.dma.flush = r200FlushElts; return retval; diff --git a/src/mesa/drivers/dri/r200/r200_context.c b/src/mesa/drivers/dri/r200/r200_context.c index 57bca064ea9..42f38a7b6c5 100644 --- a/src/mesa/drivers/dri/r200/r200_context.c +++ b/src/mesa/drivers/dri/r200/r200_context.c @@ -295,7 +295,7 @@ GLboolean r200CreateContext( gl_api api, * setting allow larger textures. */ - ctx = rmesa->radeon.glCtx; + ctx = &rmesa->radeon.glCtx; ctx->Const.MaxTextureUnits = driQueryOptioni (&rmesa->radeon.optionCache, "texture_units"); ctx->Const.MaxTextureImageUnits = ctx->Const.MaxTextureUnits; @@ -406,7 +406,7 @@ GLboolean r200CreateContext( gl_api api, others get the bit ordering right but don't actually do YUV-RGB conversion */ ctx->Extensions.MESA_ycbcr_texture = true; } - if (rmesa->radeon.glCtx->Mesa_DXTn) { + if (rmesa->radeon.glCtx.Mesa_DXTn) { ctx->Extensions.EXT_texture_compression_s3tc = true; ctx->Extensions.S3_s3tc = true; } @@ -458,7 +458,7 @@ GLboolean r200CreateContext( gl_api api, rmesa->radeon.radeonScreen->chip_flags &= ~RADEON_CHIPSET_TCL; fprintf(stderr, "Disabling HW TCL support\n"); } - TCL_FALLBACK(rmesa->radeon.glCtx, R200_TCL_FALLBACK_TCL_DISABLE, 1); + TCL_FALLBACK(&rmesa->radeon.glCtx, R200_TCL_FALLBACK_TCL_DISABLE, 1); } _mesa_compute_version(ctx); diff --git a/src/mesa/drivers/dri/r200/r200_ioctl.h b/src/mesa/drivers/dri/r200/r200_ioctl.h index 9aa00deb4e1..f9b07a4b5a3 100644 --- a/src/mesa/drivers/dri/r200/r200_ioctl.h +++ b/src/mesa/drivers/dri/r200/r200_ioctl.h @@ -76,7 +76,7 @@ void r200SetUpAtomList( r200ContextPtr rmesa ); #define R200_NEWPRIM( rmesa ) \ do { \ if ( rmesa->radeon.dma.flush ) \ - rmesa->radeon.dma.flush( rmesa->radeon.glCtx ); \ + rmesa->radeon.dma.flush( &rmesa->radeon.glCtx ); \ } while (0) /* Can accomodate several state changes and primitive changes without diff --git a/src/mesa/drivers/dri/r200/r200_state.h b/src/mesa/drivers/dri/r200/r200_state.h index 340bd8234ac..4679516c057 100644 --- a/src/mesa/drivers/dri/r200/r200_state.h +++ b/src/mesa/drivers/dri/r200/r200_state.h @@ -55,7 +55,7 @@ extern void r200Fallback( struct gl_context *ctx, GLuint bit, GLboolean mode ); #define FALLBACK( rmesa, bit, mode ) do { \ if ( 0 ) fprintf( stderr, "FALLBACK in %s: #%d=%d\n", \ __FUNCTION__, bit, mode ); \ - r200Fallback( rmesa->radeon.glCtx, bit, mode ); \ + r200Fallback( &rmesa->radeon.glCtx, bit, mode ); \ } while (0) extern void r200LightingSpaceChange( struct gl_context *ctx ); diff --git a/src/mesa/drivers/dri/r200/r200_state_init.c b/src/mesa/drivers/dri/r200/r200_state_init.c index 06e82429d76..bde16329500 100644 --- a/src/mesa/drivers/dri/r200/r200_state_init.c +++ b/src/mesa/drivers/dri/r200/r200_state_init.c @@ -617,7 +617,7 @@ static void cube_emit_cs(struct gl_context *ctx, struct radeon_state_atom *atom) */ void r200InitState( r200ContextPtr rmesa ) { - struct gl_context *ctx = rmesa->radeon.glCtx; + struct gl_context *ctx = &rmesa->radeon.glCtx; GLuint i; rmesa->radeon.Fallback = 0; diff --git a/src/mesa/drivers/dri/r200/r200_tcl.c b/src/mesa/drivers/dri/r200/r200_tcl.c index a667bd3530d..80963274526 100644 --- a/src/mesa/drivers/dri/r200/r200_tcl.c +++ b/src/mesa/drivers/dri/r200/r200_tcl.c @@ -153,7 +153,7 @@ static GLushort *r200AllocElts( r200ContextPtr rmesa, GLuint nr ) } else { if (rmesa->radeon.dma.flush) - rmesa->radeon.dma.flush( rmesa->radeon.glCtx ); + rmesa->radeon.dma.flush( &rmesa->radeon.glCtx ); r200EmitAOS( rmesa, rmesa->radeon.tcl.aos_count, 0 ); @@ -312,7 +312,7 @@ static GLuint r200EnsureEmitSize( struct gl_context * ctx , GLubyte* vimap_rev ) state_size = radeonCountStateEmitSize( &rmesa->radeon ); /* vtx may be changed in r200EmitArrays so account for it if not dirty */ if (!rmesa->hw.vtx.dirty) - state_size += rmesa->hw.vtx.check(rmesa->radeon.glCtx, &rmesa->hw.vtx); + state_size += rmesa->hw.vtx.check(&rmesa->radeon.glCtx, &rmesa->hw.vtx); /* predict size for elements */ for (i = 0; i < VB->PrimitiveCount; ++i) { @@ -546,7 +546,7 @@ static void transition_to_hwtnl( struct gl_context *ctx ) tnl->Driver.NotifyMaterialChange = r200UpdateMaterial; if ( rmesa->radeon.dma.flush ) - rmesa->radeon.dma.flush( rmesa->radeon.glCtx ); + rmesa->radeon.dma.flush( &rmesa->radeon.glCtx ); rmesa->radeon.dma.flush = NULL; @@ -613,7 +613,7 @@ void r200TclFallback( struct gl_context *ctx, GLuint bit, GLboolean mode ) if (oldfallback == 0) { /* We have to flush before transition */ if ( rmesa->radeon.dma.flush ) - rmesa->radeon.dma.flush( rmesa->radeon.glCtx ); + rmesa->radeon.dma.flush( &rmesa->radeon.glCtx ); if (R200_DEBUG & RADEON_FALLBACKS) fprintf(stderr, "R200 begin tcl fallback %s\n", @@ -626,7 +626,7 @@ void r200TclFallback( struct gl_context *ctx, GLuint bit, GLboolean mode ) if (oldfallback == bit) { /* We have to flush before transition */ if ( rmesa->radeon.dma.flush ) - rmesa->radeon.dma.flush( rmesa->radeon.glCtx ); + rmesa->radeon.dma.flush( &rmesa->radeon.glCtx ); if (R200_DEBUG & RADEON_FALLBACKS) fprintf(stderr, "R200 end tcl fallback %s\n", diff --git a/src/mesa/drivers/dri/r200/r200_tex.c b/src/mesa/drivers/dri/r200/r200_tex.c index 9d52095e247..a4347c606d7 100644 --- a/src/mesa/drivers/dri/r200/r200_tex.c +++ b/src/mesa/drivers/dri/r200/r200_tex.c @@ -422,7 +422,7 @@ static void r200DeleteTexture(struct gl_context * ctx, struct gl_texture_object if (rmesa) { int i; radeon_firevertices(&rmesa->radeon); - for ( i = 0 ; i < rmesa->radeon.glCtx->Const.MaxTextureUnits ; i++ ) { + for ( i = 0 ; i < rmesa->radeon.glCtx.Const.MaxTextureUnits ; i++ ) { if ( t == rmesa->state.texture.unit[i].texobj ) { rmesa->state.texture.unit[i].texobj = NULL; rmesa->hw.tex[i].dirty = GL_FALSE; diff --git a/src/mesa/drivers/dri/r200/r200_texstate.c b/src/mesa/drivers/dri/r200/r200_texstate.c index b25c6113960..b20bd510a13 100644 --- a/src/mesa/drivers/dri/r200/r200_texstate.c +++ b/src/mesa/drivers/dri/r200/r200_texstate.c @@ -742,9 +742,9 @@ void r200SetTexBuffer2(__DRIcontext *pDRICtx, GLint target, GLint texture_format radeon = pDRICtx->driverPrivate; rfb = dPriv->driverPrivate; - texUnit = &radeon->glCtx->Texture.Unit[radeon->glCtx->Texture.CurrentUnit]; - texObj = _mesa_select_tex_object(radeon->glCtx, texUnit, target); - texImage = _mesa_get_tex_image(radeon->glCtx, texObj, target, 0); + texUnit = &radeon->glCtx.Texture.Unit[radeon->glCtx.Texture.CurrentUnit]; + texObj = _mesa_select_tex_object(&radeon->glCtx, texUnit, target); + texImage = _mesa_get_tex_image(&radeon->glCtx, texObj, target, 0); rImage = get_radeon_texture_image(texImage); t = radeon_tex_obj(texObj); @@ -759,7 +759,7 @@ void r200SetTexBuffer2(__DRIcontext *pDRICtx, GLint target, GLint texture_format return; } - _mesa_lock_texture(radeon->glCtx, texObj); + _mesa_lock_texture(&radeon->glCtx, texObj); if (t->bo) { radeon_bo_unref(t->bo); t->bo = NULL; @@ -806,7 +806,7 @@ void r200SetTexBuffer2(__DRIcontext *pDRICtx, GLint target, GLint texture_format break; } - _mesa_init_teximage_fields(radeon->glCtx, texImage, + _mesa_init_teximage_fields(&radeon->glCtx, texImage, rb->base.Base.Width, rb->base.Base.Height, 1, 0, rb->cpp, texFormat); @@ -831,7 +831,7 @@ void r200SetTexBuffer2(__DRIcontext *pDRICtx, GLint target, GLint texture_format } t->validated = GL_TRUE; - _mesa_unlock_texture(radeon->glCtx, texObj); + _mesa_unlock_texture(&radeon->glCtx, texObj); return; } @@ -1046,7 +1046,7 @@ static void disable_tex_obj_state( r200ContextPtr rmesa, R200_STATECHANGE( rmesa, ctx ); rmesa->hw.ctx.cmd[CTX_PP_CNTL] &= ~(R200_TEX_0_ENABLE << unit); if (rmesa->radeon.TclFallback & (R200_TCL_FALLBACK_TEXGEN_0<radeon.glCtx, (R200_TCL_FALLBACK_TEXGEN_0<radeon.glCtx, (R200_TCL_FALLBACK_TEXGEN_0<cmdbuf.cs->cdw || radeon->dma.flush ) - radeon->glCtx->Driver.Flush(radeon->glCtx); /* +r6/r7 */ + radeon->glCtx.Driver.Flush(&radeon->glCtx); /* +r6/r7 */ } #endif diff --git a/src/mesa/drivers/dri/radeon/radeon_common.c b/src/mesa/drivers/dri/radeon/radeon_common.c index c9f9b207811..0cf656b6527 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common.c +++ b/src/mesa/drivers/dri/radeon/radeon_common.c @@ -83,7 +83,7 @@ void radeonSetCliprects(radeonContextPtr radeon) if ((draw_rfb->base.Width != drawable->w) || (draw_rfb->base.Height != drawable->h)) { - _mesa_resize_framebuffer(radeon->glCtx, &draw_rfb->base, + _mesa_resize_framebuffer(&radeon->glCtx, &draw_rfb->base, drawable->w, drawable->h); draw_rfb->base.Initialized = GL_TRUE; } @@ -91,14 +91,14 @@ void radeonSetCliprects(radeonContextPtr radeon) if (drawable != readable) { if ((read_rfb->base.Width != readable->w) || (read_rfb->base.Height != readable->h)) { - _mesa_resize_framebuffer(radeon->glCtx, &read_rfb->base, + _mesa_resize_framebuffer(&radeon->glCtx, &read_rfb->base, readable->w, readable->h); read_rfb->base.Initialized = GL_TRUE; } } if (radeon->state.scissor.enabled) - radeonUpdateScissor(radeon->glCtx); + radeonUpdateScissor(&radeon->glCtx); } @@ -428,7 +428,7 @@ void radeon_viewport(struct gl_context *ctx, GLint x, GLint y, GLsizei width, GL old_viewport = ctx->Driver.Viewport; ctx->Driver.Viewport = NULL; radeon_window_moved(radeon); - radeon_draw_buffer(ctx, radeon->glCtx->DrawBuffer); + radeon_draw_buffer(ctx, radeon->glCtx.DrawBuffer); ctx->Driver.Viewport = old_viewport; } @@ -440,7 +440,7 @@ static void radeon_print_state_atom(radeonContextPtr radeon, struct radeon_state if (!radeon_is_debug_enabled(RADEON_STATE, RADEON_VERBOSE) ) return; - dwords = (*state->check) (radeon->glCtx, state); + dwords = (*state->check) (&radeon->glCtx, state); fprintf(stderr, " emit %s %d/%d\n", state->name, dwords, state->cmd_size); @@ -478,7 +478,7 @@ GLuint radeonCountStateEmitSize(radeonContextPtr radeon) goto out; foreach(atom, &radeon->hw.atomlist) { if (atom->dirty) { - const GLuint atom_size = atom->check(radeon->glCtx, atom); + const GLuint atom_size = atom->check(&radeon->glCtx, atom); dwords += atom_size; if (RADEON_CMDBUF && atom_size) { radeon_print_state_atom(radeon, atom); @@ -487,7 +487,7 @@ GLuint radeonCountStateEmitSize(radeonContextPtr radeon) } } else { foreach(atom, &radeon->hw.atomlist) { - const GLuint atom_size = atom->check(radeon->glCtx, atom); + const GLuint atom_size = atom->check(&radeon->glCtx, atom); dwords += atom_size; if (RADEON_CMDBUF && atom_size) { radeon_print_state_atom(radeon, atom); @@ -505,13 +505,13 @@ static INLINE void radeon_emit_atom(radeonContextPtr radeon, struct radeon_state BATCH_LOCALS(radeon); int dwords; - dwords = (*atom->check) (radeon->glCtx, atom); + dwords = (*atom->check) (&radeon->glCtx, atom); if (dwords) { radeon_print_state_atom(radeon, atom); if (atom->emit) { - (*atom->emit)(radeon->glCtx, atom); + (*atom->emit)(&radeon->glCtx, atom); } else { BEGIN_BATCH_NO_AUTOSTATE(dwords); OUT_BATCH_TABLE(atom->cmd, dwords); @@ -666,7 +666,7 @@ int rcommonFlushCmdBufLocked(radeonContextPtr rmesa, const char *caller) fprintf(stderr, "%s from %s\n", __FUNCTION__, caller); } - radeonEmitQueryEnd(rmesa->glCtx); + radeonEmitQueryEnd(&rmesa->glCtx); if (rmesa->cmdbuf.cs->cdw) { ret = radeon_cs_emit(rmesa->cmdbuf.cs); @@ -675,7 +675,7 @@ int rcommonFlushCmdBufLocked(radeonContextPtr rmesa, const char *caller) radeon_cs_erase(rmesa->cmdbuf.cs); rmesa->cmdbuf.flushing = 0; - if (radeon_revalidate_bos(rmesa->glCtx) == GL_FALSE) { + if (radeon_revalidate_bos(&rmesa->glCtx) == GL_FALSE) { fprintf(stderr,"failed to revalidate buffers\n"); } @@ -751,7 +751,7 @@ void rcommonInitCmdBuf(radeonContextPtr rmesa) rmesa->cmdbuf.size = size; radeon_cs_space_set_flush(rmesa->cmdbuf.cs, - (void (*)(void *))rmesa->glCtx->Driver.Flush, rmesa->glCtx); + (void (*)(void *))rmesa->glCtx.Driver.Flush, &rmesa->glCtx); if (!drmCommandWriteRead(rmesa->dri.fd, DRM_RADEON_GEM_INFO, diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.c b/src/mesa/drivers/dri/radeon/radeon_common_context.c index 67f588c00e6..a56d72a6d1d 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common_context.c +++ b/src/mesa/drivers/dri/radeon/radeon_common_context.c @@ -143,15 +143,16 @@ GLboolean radeonInitContext(radeonContextPtr radeon, radeon->radeonScreen = screen; /* Allocate and initialize the Mesa context */ if (sharedContextPrivate) - shareCtx = ((radeonContextPtr)sharedContextPrivate)->glCtx; + shareCtx = &((radeonContextPtr)sharedContextPrivate)->glCtx; else shareCtx = NULL; - radeon->glCtx = _mesa_create_context(API_OPENGL, glVisual, shareCtx, - functions, (void *)radeon); - if (!radeon->glCtx) + + if (!_mesa_initialize_context(&radeon->glCtx, API_OPENGL, + glVisual, shareCtx, + functions, (void *)radeon)) return GL_FALSE; - ctx = radeon->glCtx; + ctx = &radeon->glCtx; driContextPriv->driverPrivate = radeon; _mesa_meta_init(ctx); @@ -223,7 +224,7 @@ void radeonDestroyContext(__DRIcontext *driContextPriv ) assert(radeon); - _mesa_meta_free(radeon->glCtx); + _mesa_meta_free(&radeon->glCtx); if (radeon == current) { _mesa_make_current(NULL, NULL, NULL); @@ -235,17 +236,17 @@ void radeonDestroyContext(__DRIcontext *driContextPriv ) } radeonFreeDmaRegions(radeon); - radeonReleaseArrays(radeon->glCtx, ~0); + radeonReleaseArrays(&radeon->glCtx, ~0); if (radeon->vtbl.free_context) - radeon->vtbl.free_context(radeon->glCtx); - _swsetup_DestroyContext( radeon->glCtx ); - _tnl_DestroyContext( radeon->glCtx ); - _vbo_DestroyContext( radeon->glCtx ); - _swrast_DestroyContext( radeon->glCtx ); + radeon->vtbl.free_context(&radeon->glCtx); + _swsetup_DestroyContext( &radeon->glCtx ); + _tnl_DestroyContext( &radeon->glCtx ); + _vbo_DestroyContext( &radeon->glCtx ); + _swrast_DestroyContext( &radeon->glCtx ); /* free atom list */ - /* free the Mesa context */ - _mesa_destroy_context(radeon->glCtx); + /* free the Mesa context data */ + _mesa_free_context_data(&radeon->glCtx); /* _mesa_destroy_context() might result in calls to functions that * depend on the DriverCtx, so don't set it to NULL before. @@ -277,7 +278,7 @@ GLboolean radeonUnbindContext(__DRIcontext * driContextPriv) if (RADEON_DEBUG & RADEON_DRI) fprintf(stderr, "%s ctx %p\n", __FUNCTION__, - radeon->glCtx); + &radeon->glCtx); /* Unset current context and dispath table */ _mesa_make_current(NULL, NULL, NULL); @@ -316,7 +317,7 @@ void radeon_prepare_render(radeonContextPtr radeon) radeon_update_renderbuffers(driContext, drawable, GL_FALSE); /* Intel driver does the equivalent of this, no clue if it is needed:*/ - radeon_draw_buffer(radeon->glCtx, radeon->glCtx->DrawBuffer); + radeon_draw_buffer(&radeon->glCtx, radeon->glCtx.DrawBuffer); driContext->dri2.draw_stamp = drawable->dri2.stamp; } @@ -549,7 +550,7 @@ radeon_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable, } } - driUpdateFramebufferSize(radeon->glCtx, drawable); + driUpdateFramebufferSize(&radeon->glCtx, drawable); } /* Force the context `c' to be the current context and associate with it @@ -584,7 +585,7 @@ GLboolean radeonMakeCurrent(__DRIcontext * driContextPriv, } if(driDrawPriv == NULL && driReadPriv == NULL) { - drfb = _mesa_create_framebuffer(&radeon->glCtx->Visual); + drfb = _mesa_create_framebuffer(&radeon->glCtx.Visual); readfb = drfb; } else { @@ -602,25 +603,25 @@ GLboolean radeonMakeCurrent(__DRIcontext * driContextPriv, &(radeon_get_renderbuffer(drfb, BUFFER_DEPTH)->base.Base)); if (RADEON_DEBUG & RADEON_DRI) - fprintf(stderr, "%s ctx %p dfb %p rfb %p\n", __FUNCTION__, radeon->glCtx, drfb, readfb); + fprintf(stderr, "%s ctx %p dfb %p rfb %p\n", __FUNCTION__, &radeon->glCtx, drfb, readfb); if(driDrawPriv) - driUpdateFramebufferSize(radeon->glCtx, driDrawPriv); + driUpdateFramebufferSize(&radeon->glCtx, driDrawPriv); if (driReadPriv != driDrawPriv) - driUpdateFramebufferSize(radeon->glCtx, driReadPriv); + driUpdateFramebufferSize(&radeon->glCtx, driReadPriv); - _mesa_make_current(radeon->glCtx, drfb, readfb); + _mesa_make_current(&radeon->glCtx, drfb, readfb); if (driDrawPriv == NULL && driReadPriv == NULL) _mesa_reference_framebuffer(&drfb, NULL); - _mesa_update_state(radeon->glCtx); + _mesa_update_state(&radeon->glCtx); - if (radeon->glCtx->DrawBuffer == drfb) { + if (radeon->glCtx.DrawBuffer == drfb) { if(driDrawPriv != NULL) { radeon_window_moved(radeon); } - radeon_draw_buffer(radeon->glCtx, drfb); + radeon_draw_buffer(&radeon->glCtx, drfb); } diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.h b/src/mesa/drivers/dri/radeon/radeon_common_context.h index 5c2389208f1..6149fcc48fb 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common_context.h +++ b/src/mesa/drivers/dri/radeon/radeon_common_context.h @@ -384,7 +384,7 @@ struct radeon_cmdbuf { }; struct radeon_context { - struct gl_context *glCtx; + struct gl_context glCtx; /**< base class, must be first */ radeonScreenPtr radeonScreen; /* Screen private DRI data */ /* Texture object bookkeeping diff --git a/src/mesa/drivers/dri/radeon/radeon_context.c b/src/mesa/drivers/dri/radeon/radeon_context.c index 0ee0aeedfa1..962f08ac698 100644 --- a/src/mesa/drivers/dri/radeon/radeon_context.c +++ b/src/mesa/drivers/dri/radeon/radeon_context.c @@ -257,7 +257,7 @@ r100CreateContext( gl_api api, * setting allow larger textures. */ - ctx = rmesa->radeon.glCtx; + ctx = &rmesa->radeon.glCtx; ctx->Const.MaxTextureUnits = driQueryOptioni (&rmesa->radeon.optionCache, "texture_units"); ctx->Const.MaxTextureImageUnits = ctx->Const.MaxTextureUnits; @@ -357,7 +357,7 @@ r100CreateContext( gl_api api, ctx->Extensions.EXT_framebuffer_object = true; ctx->Extensions.ARB_texture_cube_map = true; - if (rmesa->radeon.glCtx->Mesa_DXTn) { + if (rmesa->radeon.glCtx.Mesa_DXTn) { ctx->Extensions.EXT_texture_compression_s3tc = true; ctx->Extensions.S3_s3tc = true; } @@ -403,7 +403,7 @@ r100CreateContext( gl_api api, rmesa->radeon.radeonScreen->chip_flags &= ~RADEON_CHIPSET_TCL; fprintf(stderr, "Disabling HW TCL support\n"); } - TCL_FALLBACK(rmesa->radeon.glCtx, RADEON_TCL_FALLBACK_TCL_DISABLE, 1); + TCL_FALLBACK(&rmesa->radeon.glCtx, RADEON_TCL_FALLBACK_TCL_DISABLE, 1); } if (rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL) { diff --git a/src/mesa/drivers/dri/radeon/radeon_dma.c b/src/mesa/drivers/dri/radeon/radeon_dma.c index 9193d13e83b..3497d481d4b 100644 --- a/src/mesa/drivers/dri/radeon/radeon_dma.c +++ b/src/mesa/drivers/dri/radeon/radeon_dma.c @@ -270,7 +270,7 @@ void radeonAllocDmaRegion(radeonContextPtr rmesa, fprintf(stderr, "%s %d\n", __FUNCTION__, bytes); if (rmesa->dma.flush) - rmesa->dma.flush(rmesa->glCtx); + rmesa->dma.flush(&rmesa->glCtx); assert(rmesa->dma.current_used == rmesa->dma.current_vertexptr); @@ -459,7 +459,7 @@ rcommonAllocDmaLowVerts( radeonContextPtr rmesa, int nverts, int vsize ) if(is_empty_list(&rmesa->dma.reserved) ||rmesa->dma.current_vertexptr + bytes > first_elem(&rmesa->dma.reserved)->bo->size) { if (rmesa->dma.flush) { - rmesa->dma.flush(rmesa->glCtx); + rmesa->dma.flush(&rmesa->glCtx); } radeonRefillCurrentDmaRegion(rmesa, bytes); @@ -469,7 +469,7 @@ rcommonAllocDmaLowVerts( radeonContextPtr rmesa, int nverts, int vsize ) if (!rmesa->dma.flush) { /* if cmdbuf flushed DMA restart */ - rmesa->glCtx->Driver.NeedFlush |= FLUSH_STORED_VERTICES; + rmesa->glCtx.Driver.NeedFlush |= FLUSH_STORED_VERTICES; rmesa->dma.flush = rcommon_flush_last_swtcl_prim; } @@ -499,7 +499,7 @@ void radeonReleaseArrays( struct gl_context *ctx, GLuint newinputs ) fprintf(stderr, "%s\n", __FUNCTION__); if (radeon->dma.flush) { - radeon->dma.flush(radeon->glCtx); + radeon->dma.flush(&radeon->glCtx); } for (i = 0; i < radeon->tcl.aos_count; i++) { if (radeon->tcl.aos[i].bo) { diff --git a/src/mesa/drivers/dri/radeon/radeon_fbo.c b/src/mesa/drivers/dri/radeon/radeon_fbo.c index 481eb5a49c1..291f2b78188 100644 --- a/src/mesa/drivers/dri/radeon/radeon_fbo.c +++ b/src/mesa/drivers/dri/radeon/radeon_fbo.c @@ -596,7 +596,7 @@ radeon_image_target_renderbuffer_storage(struct gl_context *ctx, rb->Width = image->width; rb->Height = image->height; rb->Format = image->format; - rb->_BaseFormat = _mesa_base_fbo_format(radeon->glCtx, + rb->_BaseFormat = _mesa_base_fbo_format(&radeon->glCtx, image->internal_format); } @@ -944,18 +944,18 @@ radeon_validate_framebuffer(struct gl_context *ctx, struct gl_framebuffer *fb) void radeon_fbo_init(struct radeon_context *radeon) { - radeon->glCtx->Driver.NewFramebuffer = radeon_new_framebuffer; - radeon->glCtx->Driver.NewRenderbuffer = radeon_new_renderbuffer; - radeon->glCtx->Driver.MapRenderbuffer = radeon_map_renderbuffer; - radeon->glCtx->Driver.UnmapRenderbuffer = radeon_unmap_renderbuffer; - radeon->glCtx->Driver.BindFramebuffer = radeon_bind_framebuffer; - radeon->glCtx->Driver.FramebufferRenderbuffer = radeon_framebuffer_renderbuffer; - radeon->glCtx->Driver.RenderTexture = radeon_render_texture; - radeon->glCtx->Driver.FinishRenderTexture = radeon_finish_render_texture; - radeon->glCtx->Driver.ResizeBuffers = radeon_resize_buffers; - radeon->glCtx->Driver.ValidateFramebuffer = radeon_validate_framebuffer; - radeon->glCtx->Driver.BlitFramebuffer = _mesa_meta_BlitFramebuffer; - radeon->glCtx->Driver.EGLImageTargetRenderbufferStorage = + radeon->glCtx.Driver.NewFramebuffer = radeon_new_framebuffer; + radeon->glCtx.Driver.NewRenderbuffer = radeon_new_renderbuffer; + radeon->glCtx.Driver.MapRenderbuffer = radeon_map_renderbuffer; + radeon->glCtx.Driver.UnmapRenderbuffer = radeon_unmap_renderbuffer; + radeon->glCtx.Driver.BindFramebuffer = radeon_bind_framebuffer; + radeon->glCtx.Driver.FramebufferRenderbuffer = radeon_framebuffer_renderbuffer; + radeon->glCtx.Driver.RenderTexture = radeon_render_texture; + radeon->glCtx.Driver.FinishRenderTexture = radeon_finish_render_texture; + radeon->glCtx.Driver.ResizeBuffers = radeon_resize_buffers; + radeon->glCtx.Driver.ValidateFramebuffer = radeon_validate_framebuffer; + radeon->glCtx.Driver.BlitFramebuffer = _mesa_meta_BlitFramebuffer; + radeon->glCtx.Driver.EGLImageTargetRenderbufferStorage = radeon_image_target_renderbuffer_storage; } diff --git a/src/mesa/drivers/dri/radeon/radeon_ioctl.c b/src/mesa/drivers/dri/radeon/radeon_ioctl.c index c6c8b054351..4167820765b 100644 --- a/src/mesa/drivers/dri/radeon/radeon_ioctl.c +++ b/src/mesa/drivers/dri/radeon/radeon_ioctl.c @@ -64,7 +64,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */ void radeonSetUpAtomList( r100ContextPtr rmesa ) { - int i, mtu = rmesa->radeon.glCtx->Const.MaxTextureUnits; + int i, mtu = rmesa->radeon.glCtx.Const.MaxTextureUnits; make_empty_list(&rmesa->radeon.hw.atomlist); rmesa->radeon.hw.atomlist.name = "atom-list"; @@ -208,7 +208,7 @@ void radeonFlushElts( struct gl_context *ctx ) if (RADEON_DEBUG & RADEON_SYNC) { fprintf(stderr, "%s: Syncing\n", __FUNCTION__); - radeonFinish( rmesa->radeon.glCtx ); + radeonFinish( &rmesa->radeon.glCtx ); } } @@ -267,7 +267,7 @@ GLushort *radeonAllocEltsOpenEnded( r100ContextPtr rmesa, __FUNCTION__, primitive); assert(!rmesa->radeon.dma.flush); - rmesa->radeon.glCtx->Driver.NeedFlush |= FLUSH_STORED_VERTICES; + rmesa->radeon.glCtx.Driver.NeedFlush |= FLUSH_STORED_VERTICES; rmesa->radeon.dma.flush = radeonFlushElts; return retval; diff --git a/src/mesa/drivers/dri/radeon/radeon_ioctl.h b/src/mesa/drivers/dri/radeon/radeon_ioctl.h index 3297b5cd841..1659682f02c 100644 --- a/src/mesa/drivers/dri/radeon/radeon_ioctl.h +++ b/src/mesa/drivers/dri/radeon/radeon_ioctl.h @@ -92,7 +92,7 @@ extern void radeonSetUpAtomList( r100ContextPtr rmesa ); #define RADEON_NEWPRIM( rmesa ) \ do { \ if ( rmesa->radeon.dma.flush ) \ - rmesa->radeon.dma.flush( rmesa->radeon.glCtx ); \ + rmesa->radeon.dma.flush( &rmesa->radeon.glCtx ); \ } while (0) /* Can accomodate several state changes and primitive changes without diff --git a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c index 8901090df8b..668ef9f1993 100644 --- a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c +++ b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c @@ -160,7 +160,7 @@ static void calculate_miptree_layout(radeonContextPtr rmesa, radeon_mipmap_tree { GLuint curOffset, i, face, level; - assert(mt->numLevels <= rmesa->glCtx->Const.MaxTextureLevels); + assert(mt->numLevels <= rmesa->glCtx.Const.MaxTextureLevels); curOffset = 0; for(face = 0; face < mt->faces; face++) { diff --git a/src/mesa/drivers/dri/radeon/radeon_queryobj.c b/src/mesa/drivers/dri/radeon/radeon_queryobj.c index 5c02f5c2ed0..705d612e10b 100644 --- a/src/mesa/drivers/dri/radeon/radeon_queryobj.c +++ b/src/mesa/drivers/dri/radeon/radeon_queryobj.c @@ -111,7 +111,7 @@ static void radeonBeginQuery(struct gl_context *ctx, struct gl_query_object *q) assert(radeon->query.current == NULL); if (radeon->dma.flush) - radeon->dma.flush(radeon->glCtx); + radeon->dma.flush(&radeon->glCtx); if (!query->bo) { query->bo = radeon_bo_open(radeon->radeonScreen->bom, 0, RADEON_QUERY_PAGE_SIZE, RADEON_QUERY_PAGE_SIZE, RADEON_GEM_DOMAIN_GTT, 0); @@ -151,7 +151,7 @@ static void radeonEndQuery(struct gl_context *ctx, struct gl_query_object *q) radeon_print(RADEON_STATE, RADEON_NORMAL, "%s: query id %d\n", __FUNCTION__, q->Id); if (radeon->dma.flush) - radeon->dma.flush(radeon->glCtx); + radeon->dma.flush(&radeon->glCtx); radeonEmitQueryEnd(ctx); radeon->query.current = NULL; diff --git a/src/mesa/drivers/dri/radeon/radeon_screen.c b/src/mesa/drivers/dri/radeon/radeon_screen.c index 237503d7708..7a637ddf92a 100644 --- a/src/mesa/drivers/dri/radeon/radeon_screen.c +++ b/src/mesa/drivers/dri/radeon/radeon_screen.c @@ -192,7 +192,7 @@ radeonDRI2Flush(__DRIdrawable *drawable) radeonContextPtr rmesa; rmesa = (radeonContextPtr) drawable->driContextPriv->driverPrivate; - radeonFlush(rmesa->glCtx); + radeonFlush(&rmesa->glCtx); } static const struct __DRI2flushExtensionRec radeonFlushExtension = { @@ -267,9 +267,9 @@ radeon_create_image_from_renderbuffer(__DRIcontext *context, struct gl_renderbuffer *rb; struct radeon_renderbuffer *rrb; - rb = _mesa_lookup_renderbuffer(radeon->glCtx, renderbuffer); + rb = _mesa_lookup_renderbuffer(&radeon->glCtx, renderbuffer); if (!rb) { - _mesa_error(radeon->glCtx, + _mesa_error(&radeon->glCtx, GL_INVALID_OPERATION, "glRenderbufferExternalMESA"); return NULL; } diff --git a/src/mesa/drivers/dri/radeon/radeon_state.c b/src/mesa/drivers/dri/radeon/radeon_state.c index d930e76736a..7f12f9c3837 100644 --- a/src/mesa/drivers/dri/radeon/radeon_state.c +++ b/src/mesa/drivers/dri/radeon/radeon_state.c @@ -1850,7 +1850,7 @@ void radeonUploadTexMatrix( r100ContextPtr rmesa, int idx = TEXMAT_0 + unit; float *dest = ((float *)RADEON_DB_STATE( mat[idx] )) + MAT_ELT_0; int i; - struct gl_texture_unit tUnit = rmesa->radeon.glCtx->Texture.Unit[unit]; + struct gl_texture_unit tUnit = rmesa->radeon.glCtx.Texture.Unit[unit]; GLfloat *src = rmesa->tmpmat[unit].m; rmesa->TexMatColSwap &= ~(1 << unit); diff --git a/src/mesa/drivers/dri/radeon/radeon_state.h b/src/mesa/drivers/dri/radeon/radeon_state.h index 5bcb415c65e..cb98969c492 100644 --- a/src/mesa/drivers/dri/radeon/radeon_state.h +++ b/src/mesa/drivers/dri/radeon/radeon_state.h @@ -57,7 +57,7 @@ extern void radeonFallback( struct gl_context *ctx, GLuint bit, GLboolean mode ) #define FALLBACK( rmesa, bit, mode ) do { \ if ( 0 ) fprintf( stderr, "FALLBACK in %s: #%d=%d\n", \ __FUNCTION__, bit, mode ); \ - radeonFallback( rmesa->radeon.glCtx, bit, mode ); \ + radeonFallback( &rmesa->radeon.glCtx, bit, mode ); \ } while (0) diff --git a/src/mesa/drivers/dri/radeon/radeon_state_init.c b/src/mesa/drivers/dri/radeon/radeon_state_init.c index f162f88b25e..8c88dd01831 100644 --- a/src/mesa/drivers/dri/radeon/radeon_state_init.c +++ b/src/mesa/drivers/dri/radeon/radeon_state_init.c @@ -503,7 +503,7 @@ static void tex_emit_cs(struct gl_context *ctx, struct radeon_state_atom *atom) */ void radeonInitState( r100ContextPtr rmesa ) { - struct gl_context *ctx = rmesa->radeon.glCtx; + struct gl_context *ctx = &rmesa->radeon.glCtx; GLuint i; rmesa->radeon.Fallback = 0; diff --git a/src/mesa/drivers/dri/radeon/radeon_tcl.c b/src/mesa/drivers/dri/radeon/radeon_tcl.c index 52e435c83bb..7abc6c3c8dd 100644 --- a/src/mesa/drivers/dri/radeon/radeon_tcl.c +++ b/src/mesa/drivers/dri/radeon/radeon_tcl.c @@ -147,7 +147,7 @@ static GLboolean discrete_prim[0x10] = { static GLushort *radeonAllocElts( r100ContextPtr rmesa, GLuint nr ) { if (rmesa->radeon.dma.flush) - rmesa->radeon.dma.flush( rmesa->radeon.glCtx ); + rmesa->radeon.dma.flush( &rmesa->radeon.glCtx ); radeonEmitAOS( rmesa, rmesa->radeon.tcl.aos_count, 0 ); @@ -314,7 +314,7 @@ static GLuint radeonEnsureEmitSize( struct gl_context * ctx , GLuint inputs ) state_size = radeonCountStateEmitSize( &rmesa->radeon ); /* tcl may be changed in radeonEmitArrays so account for it if not dirty */ if (!rmesa->hw.tcl.dirty) - state_size += rmesa->hw.tcl.check( rmesa->radeon.glCtx, &rmesa->hw.tcl ); + state_size += rmesa->hw.tcl.check( &rmesa->radeon.glCtx, &rmesa->hw.tcl ); /* predict size for elements */ for (i = 0; i < VB->PrimitiveCount; ++i) { @@ -500,7 +500,7 @@ static void transition_to_hwtnl( struct gl_context *ctx ) tnl->Driver.NotifyMaterialChange = radeonUpdateMaterial; if ( rmesa->radeon.dma.flush ) - rmesa->radeon.dma.flush( rmesa->radeon.glCtx ); + rmesa->radeon.dma.flush( &rmesa->radeon.glCtx ); rmesa->radeon.dma.flush = NULL; rmesa->swtcl.vertex_format = 0; diff --git a/src/mesa/drivers/dri/radeon/radeon_tex.c b/src/mesa/drivers/dri/radeon/radeon_tex.c index fcd9a76a998..5ca07e04e79 100644 --- a/src/mesa/drivers/dri/radeon/radeon_tex.c +++ b/src/mesa/drivers/dri/radeon/radeon_tex.c @@ -364,7 +364,7 @@ static void radeonDeleteTexture( struct gl_context *ctx, if ( rmesa ) { radeon_firevertices(&rmesa->radeon); - for ( i = 0 ; i < rmesa->radeon.glCtx->Const.MaxTextureUnits ; i++ ) { + for ( i = 0 ; i < rmesa->radeon.glCtx.Const.MaxTextureUnits ; i++ ) { if ( t == rmesa->state.texture.unit[i].texobj ) { rmesa->state.texture.unit[i].texobj = NULL; rmesa->hw.tex[i].dirty = GL_FALSE; diff --git a/src/mesa/drivers/dri/radeon/radeon_texstate.c b/src/mesa/drivers/dri/radeon/radeon_texstate.c index d2b5b755d6e..944bac6017b 100644 --- a/src/mesa/drivers/dri/radeon/radeon_texstate.c +++ b/src/mesa/drivers/dri/radeon/radeon_texstate.c @@ -619,9 +619,9 @@ void radeonSetTexBuffer2(__DRIcontext *pDRICtx, GLint target, GLint texture_form radeon = pDRICtx->driverPrivate; rfb = dPriv->driverPrivate; - texUnit = _mesa_get_current_tex_unit(radeon->glCtx); - texObj = _mesa_select_tex_object(radeon->glCtx, texUnit, target); - texImage = _mesa_get_tex_image(radeon->glCtx, texObj, target, 0); + texUnit = _mesa_get_current_tex_unit(&radeon->glCtx); + texObj = _mesa_select_tex_object(&radeon->glCtx, texUnit, target); + texImage = _mesa_get_tex_image(&radeon->glCtx, texObj, target, 0); rImage = get_radeon_texture_image(texImage); t = radeon_tex_obj(texObj); @@ -636,7 +636,7 @@ void radeonSetTexBuffer2(__DRIcontext *pDRICtx, GLint target, GLint texture_form return; } - _mesa_lock_texture(radeon->glCtx, texObj); + _mesa_lock_texture(&radeon->glCtx, texObj); if (t->bo) { radeon_bo_unref(t->bo); t->bo = NULL; @@ -681,7 +681,7 @@ void radeonSetTexBuffer2(__DRIcontext *pDRICtx, GLint target, GLint texture_form break; } - _mesa_init_teximage_fields(radeon->glCtx, texImage, + _mesa_init_teximage_fields(&radeon->glCtx, texImage, rb->base.Base.Width, rb->base.Base.Height, 1, 0, rb->cpp, texFormat); @@ -706,7 +706,7 @@ void radeonSetTexBuffer2(__DRIcontext *pDRICtx, GLint target, GLint texture_form (texImage->HeightLog2 << RADEON_TXFORMAT_HEIGHT_SHIFT)); } t->validated = GL_TRUE; - _mesa_unlock_texture(radeon->glCtx, texObj); + _mesa_unlock_texture(&radeon->glCtx, texObj); return; } @@ -747,7 +747,7 @@ static void disable_tex_obj_state( r100ContextPtr rmesa, RADEON_Q_BIT(unit)); if (rmesa->radeon.TclFallback & (RADEON_TCL_FALLBACK_TEXGEN_0<radeon.glCtx, (RADEON_TCL_FALLBACK_TEXGEN_0<radeon.glCtx, (RADEON_TCL_FALLBACK_TEXGEN_0<recheck_texgen[unit] = GL_TRUE; }