From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Wed, 23 Jun 2021 21:57:30 +0000 (+0100)
Subject: add SVP64 alternative LDST decoder (unused so far)
X-Git-Tag: xlen-bcd~401
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=5a945d5c9fa7eb7ba589931f818ef9a3393b8f1f;p=openpower-isa.git

add SVP64 alternative LDST decoder (unused so far)
---

diff --git a/src/openpower/decoder/power_decoder2.py b/src/openpower/decoder/power_decoder2.py
index b9f121a2..41394b27 100644
--- a/src/openpower/decoder/power_decoder2.py
+++ b/src/openpower/decoder/power_decoder2.py
@@ -24,7 +24,8 @@ from openpower.decoder.power_svp64_rm import (SVP64RMModeDecode,
 from openpower.sv.svp64 import SVP64Rec
 
 from openpower.decoder.power_regspec_map import regspec_decode_read
-from openpower.decoder.power_decoder import create_pdecode
+from openpower.decoder.power_decoder import (create_pdecode,
+                                             create_pdecode_svp64,)
 from openpower.decoder.power_enums import (MicrOp, CryIn, Function,
                                      CRInSel, CROutSel,
                                      LdstLen, In1Sel, In2Sel, In3Sel,
@@ -767,6 +768,16 @@ class PowerDecodeSubset(Elaboratable):
             dec = create_pdecode(name=fn_name, col_subset=col_subset,
                                       row_subset=self.rowsubsetfn)
         self.dec = dec
+        # create SVP64 decoder
+        if svp64_en:
+            if fn_name:
+                name = "sv_"+fn_name
+            else:
+                name = "svdec"
+            svdec = create_pdecode(name=name,
+                                      col_subset=col_subset,
+                                      row_subset=self.rowsubsetfn)
+            self.svdec = svdec
 
         # state information needed by the Decoder
         if state is None:
@@ -804,6 +815,7 @@ class PowerDecodeSubset(Elaboratable):
         ports = self.dec.ports() + self.e.ports()
         if self.svp64_en:
             ports += self.sv_rm.ports()
+            ports += self.svdec.ports()
         return ports
 
     def needs_field(self, field, op_field):
@@ -857,6 +869,8 @@ class PowerDecodeSubset(Elaboratable):
         if self.svp64_en:
             # and SVP64 RM mode decoder
             m.submodules.sv_rm_dec = rm_dec = self.rm_dec
+            # and SVP64 decoder
+            m.submodules.svdec = svdec = self.svdec
 
         # copy instruction through...
         for i in [do.insn, dec_rc.insn_in, dec_oe.insn_in, ]: