From: klehman <klehman9@comcast.net>
Date: Mon, 25 Oct 2021 14:13:39 +0000 (-0400)
Subject: tmp creation/string formatting
X-Git-Tag: sv_maxu_works-initial~775
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=5ada14e4fed3098edac3449cc880b975c68733fb;p=openpower-isa.git

tmp creation/string formatting
---

diff --git a/src/openpower/test/state.py b/src/openpower/test/state.py
index f1eb8ef2..2b00fbd1 100644
--- a/src/openpower/test/state.py
+++ b/src/openpower/test/state.py
@@ -24,6 +24,7 @@ methods, the use of yield from/yield is required.
 
 from openpower.decoder.power_enums import XER_bits
 from openpower.util import log
+import os
 
 global staterunner_factory
 staterunner_factory = {}
@@ -221,29 +222,27 @@ class ExpectedState(State):
         to set an expected state object
         """
         lindent = ' '*8 # indent for code
-        with open("/tmp/{0}.py".format(testname), "w") as sout:
+        path = "/tmp/expected/"  # temp for now
+        os.makedirs(path, exist_ok=True)
+        with open("%s%s.py" % (path, testname), "w") as sout:
             # pc and intregs
-            sout.write(f"{lindent}e = ExpectedState(pc={state.pc})\n")
-            for i in range(32):
-                if(state.intregs[i] != 0):
-                    sout.write("{0}e.intregs[{1}] = 0x{2:x}\n".format(
-                               lindent,
-                               i,
-                               state.intregs[i]))
+            sout.write("%se = ExpectedState(pc=%d)\n" % (lindent, state.pc))
+            for i, reg in enumerate(state.intregs):
+                if(reg != 0):
+                    msg = "%se.intregs[%d] = 0x%x\n"
+                    sout.write( msg % (lindent, i, reg))
             # cr
-            for i in range(8):
-                if(state.crregs[i] != 0):
-                    sout.write("{0}e.crregs[{1}] = 0x{2:x}\n".format(
-                               lindent,
-                               i,
-                               state.crregs[i]))
+            for i, reg in enumerate(state.crregs):
+                if(reg != 0):
+                    msg = "%se.crregs[%d] = 0x%x\n"
+                    sout.write( msg % (lindent, i, reg))
             # XER
             if(state.so != 0):
-                sout.write(f"{lindent}e.so = 0x{state.so}\n")
+                sout.write("%se.so = 0x%x\n" % (lindent, state.so))
             if(state.ov != 0):
-                sout.write(f"{lindent}e.sv = 0x{state.ov}\n")
+                sout.write("%se.ov = 0x%x\n" % (lindent, state.ov))
             if(state.ca != 0):
-                sout.write(f"{lindent}e.ca = 0x{state.ca}\n")
+                sout.write("%se.ca = 0x%x\n" % (lindent, state.ca))
 
 
 global state_factory