From: lkcl <lkcl@web>
Date: Wed, 9 Mar 2022 00:59:04 +0000 (+0000)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~3116
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=5af4485d6d119cd3d74305d1705501295bd1dd6e;p=libreriscv.git

---

diff --git a/openpower/sv/bitmanip.mdwn b/openpower/sv/bitmanip.mdwn
index 014c78e7d..b2ab23263 100644
--- a/openpower/sv/bitmanip.mdwn
+++ b/openpower/sv/bitmanip.mdwn
@@ -12,7 +12,7 @@
 
 **DRAFT STATUS**
 
-<https://libre-soc.org/openpower/isa/bitmanip/>
+pseudocode: <https://libre-soc.org/openpower/isa/bitmanip/>
 
 this extension amalgamates bitmanipulation primitives from many sources, including RISC-V bitmanip, Packed SIMD, AVX-512 and OpenPOWER VSX.  Vectorisation and SIMD are removed: these are straight scalar (element) operations making them suitable for embedded applications.
 Vectorisation Context is provided by [[openpower/sv]].