From: Clifford Wolf Date: Wed, 1 Mar 2017 09:47:05 +0000 (+0100) Subject: Allow $anyconst, etc. in non-formal SV mode X-Git-Tag: yosys-0.8~462 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=5b3b5ffc8cb1a3dcc846c5f62ffb5e0cffb9e055;p=yosys.git Allow $anyconst, etc. in non-formal SV mode --- diff --git a/frontends/verilog/verilog_parser.y b/frontends/verilog/verilog_parser.y index 60b1ecffd..e84250146 100644 --- a/frontends/verilog/verilog_parser.y +++ b/frontends/verilog/verilog_parser.y @@ -1319,7 +1319,7 @@ rvalue: $$ = new AstNode(AST_IDENTIFIER, $2); $$->str = *$1; delete $1; - if ($2 == nullptr && formal_mode && ($$->str == "\\$initstate" || $$->str == "\\$anyconst" || $$->str == "\\$anyseq")) + if ($2 == nullptr && ($$->str == "\\$initstate" || $$->str == "\\$anyconst" || $$->str == "\\$anyseq")) $$->type = AST_FCALL; } | hierarchical_id non_opt_multirange {