From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Wed, 20 May 2020 13:30:23 +0000 (+0100)
Subject: fix imports in fu matrix tests
X-Git-Tag: div_pipeline~1045
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=5b5432f437bfcebf7c5f54ab256625b0da645f6a;p=soc.git

fix imports in fu matrix tests
---

diff --git a/src/soc/scoreboard/test_mem2_fu_matrix.py b/src/soc/scoreboard/test_mem2_fu_matrix.py
index 66a87932..9fd84b24 100644
--- a/src/soc/scoreboard/test_mem2_fu_matrix.py
+++ b/src/soc/scoreboard/test_mem2_fu_matrix.py
@@ -17,7 +17,9 @@ from math import log
 import unittest
 
 # FIXME: fixed up imports
-from ..experiment.score6600 import IssueToScoreboard, RegSim, instr_q, wait_for_busy_clear, wait_for_issue, CompUnitALUs, CompUnitBR, CompUnitsBase
+from soc.experiment.score6600 import (IssueToScoreboard, RegSim, instr_q,
+                                      wait_for_busy_clear, wait_for_issue, 
+                                      CompUnitALUs, CompUnitBR, CompUnitsBase)
 
 
 class Memory(Elaboratable):
@@ -576,9 +578,9 @@ def mem_sim(dut):
 
 
 def test_mem_fus():
-    dut = MemFunctionUnits(3, 11)
+    dut = MemFunctionUnits(8, 11)
     vl = rtlil.convert(dut, ports=dut.ports())
-    with open("test_mem_fus.il", "w") as f:
+    with open("test_mem2_fus.il", "w") as f:
         f.write(vl)
 
     run_simulation(dut, mem_sim(dut),
diff --git a/src/soc/scoreboard/test_mem_fu_matrix.py b/src/soc/scoreboard/test_mem_fu_matrix.py
index 12dba0cc..949d0ff2 100644
--- a/src/soc/scoreboard/test_mem_fu_matrix.py
+++ b/src/soc/scoreboard/test_mem_fu_matrix.py
@@ -672,7 +672,7 @@ def mem_sim(dut):
 
 
 def test_mem_fus():
-    dut = MemFunctionUnits(3)
+    dut = MemFunctionUnits(8)
     vl = rtlil.convert(dut, ports=dut.ports())
     with open("test_mem_fus.il", "w") as f:
         f.write(vl)