From: lkcl <lkcl@web>
Date: Tue, 25 Jun 2019 07:17:47 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: convert-csv-opcode-to-binary~4469
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=5b5dc9728f877661298abe12925b9d91256f0ec8;p=libreriscv.git

---

diff --git a/simple_v_extension/sv_prefix_proposal.rst b/simple_v_extension/sv_prefix_proposal.rst
index 07c7fa93d..77bce0da1 100644
--- a/simple_v_extension/sv_prefix_proposal.rst
+++ b/simple_v_extension/sv_prefix_proposal.rst
@@ -812,6 +812,16 @@ The idea is that the compiler knows maxVL at compile time since it allocated the
 backing registers, so SETVL has the maxVL as an immediate value. There is no
 maxVL CSR needed for just SVPrefix.
 
+> when looking at a loop assembly sequence
+> i think you'll find this approach will not work.
+> RVV loops on which SV loops are directly based needs understanding
+> of the use of MIN. Yes MVL is known at compile time
+> however unless MVL is communicates to the hardware, SETVL just
+> does not work.
+> The only other option which does work is to set a mandatory
+> hardcoded MVL baked into the actual hardware.
+> That results in loss of flexibility and defeats the purpose of SV. 
+
 --
 
 With SUBVL (sub vector len) being both a CSR and also part of the 48/64