From: Eddie Hung Date: Thu, 14 May 2020 16:45:54 +0000 (-0700) Subject: Merge pull request #2045 from YosysHQ/eddie/fix2042 X-Git-Tag: working-ls180~554 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=5bcde7ccc331e575682823222c97cc414bb3d808;p=yosys.git Merge pull request #2045 from YosysHQ/eddie/fix2042 verilog: error if no direction given for task arguments, default to input in SV mode --- 5bcde7ccc331e575682823222c97cc414bb3d808