From: Sebastian Huber Date: Fri, 9 Jan 2015 13:38:21 +0000 (+0000) Subject: RTEMS: Rename ARM target config files X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=5be0a29be19de39984d1a6cc11ce95483b175fb9;p=gcc.git RTEMS: Rename ARM target config files Now that we only have the EABI configuration for RTEMS rename the files to match the pattern used for the other RTEMS targets. gcc/ChangeLog * config/arm/t-rtems-eabi: Rename to... * config/arm/t-rtems: ...this. * config/arm/rtems-eabi.h: Rename to... * config/arm/rtems.h: ...this. * config.gcc (arm*-*-rtems*): Reflect changes above. From-SVN: r219382 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 7289e152af9..9ef523f7339 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2015-01-09 Sebastian Huber + + * config/arm/t-rtems-eabi: Rename to... + * config/arm/t-rtems: ...this. + * config/arm/rtems-eabi.h: Rename to... + * config/arm/rtems.h: ...this. + * config.gcc (arm*-*-rtems*): Reflect changes above. + 2015-01-09 Richard Biener PR tree-optimization/64410 diff --git a/gcc/config.gcc b/gcc/config.gcc index 857b3b0bc95..04026e38fb9 100644 --- a/gcc/config.gcc +++ b/gcc/config.gcc @@ -1057,8 +1057,8 @@ arm*-*-eabi* | arm*-*-symbianelf* | arm*-*-rtems*) use_gcc_stdint=wrap ;; arm*-*-rtems*) - tm_file="${tm_file} rtems.h arm/rtems-eabi.h newlib-stdint.h" - tmake_file="${tmake_file} arm/t-bpabi arm/t-rtems-eabi" + tm_file="${tm_file} rtems.h arm/rtems.h newlib-stdint.h" + tmake_file="${tmake_file} arm/t-bpabi arm/t-rtems" ;; arm*-*-symbianelf*) tm_file="${tm_file} arm/symbian.h" diff --git a/gcc/config/arm/rtems-eabi.h b/gcc/config/arm/rtems-eabi.h deleted file mode 100644 index e6dfa5303f6..00000000000 --- a/gcc/config/arm/rtems-eabi.h +++ /dev/null @@ -1,29 +0,0 @@ -/* Definitions for RTEMS based ARM systems using EABI. - Copyright (C) 2011-2015 Free Software Foundation, Inc. - - This file is part of GCC. - - GCC is free software; you can redistribute it and/or modify it - under the terms of the GNU General Public License as published - by the Free Software Foundation; either version 3, or (at your - option) any later version. - - GCC is distributed in the hope that it will be useful, but WITHOUT - ANY WARRANTY; without even the implied warranty of MERCHANTABILITY - or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public - License for more details. - - You should have received a copy of the GNU General Public License - along with GCC; see the file COPYING3. If not see - . */ - -#define HAS_INIT_SECTION - -#undef TARGET_OS_CPP_BUILTINS -#define TARGET_OS_CPP_BUILTINS() \ - do { \ - builtin_define ("__rtems__"); \ - builtin_define ("__USE_INIT_FINI__"); \ - builtin_assert ("system=rtems"); \ - TARGET_BPABI_CPP_BUILTINS(); \ - } while (0) diff --git a/gcc/config/arm/rtems.h b/gcc/config/arm/rtems.h new file mode 100644 index 00000000000..e6dfa5303f6 --- /dev/null +++ b/gcc/config/arm/rtems.h @@ -0,0 +1,29 @@ +/* Definitions for RTEMS based ARM systems using EABI. + Copyright (C) 2011-2015 Free Software Foundation, Inc. + + This file is part of GCC. + + GCC is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published + by the Free Software Foundation; either version 3, or (at your + option) any later version. + + GCC is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public + License for more details. + + You should have received a copy of the GNU General Public License + along with GCC; see the file COPYING3. If not see + . */ + +#define HAS_INIT_SECTION + +#undef TARGET_OS_CPP_BUILTINS +#define TARGET_OS_CPP_BUILTINS() \ + do { \ + builtin_define ("__rtems__"); \ + builtin_define ("__USE_INIT_FINI__"); \ + builtin_assert ("system=rtems"); \ + TARGET_BPABI_CPP_BUILTINS(); \ + } while (0) diff --git a/gcc/config/arm/t-rtems b/gcc/config/arm/t-rtems new file mode 100644 index 00000000000..92c4dcb1288 --- /dev/null +++ b/gcc/config/arm/t-rtems @@ -0,0 +1,167 @@ +# Custom RTEMS EABI multilibs + +MULTILIB_OPTIONS = mbig-endian mthumb march=armv6-m/march=armv7-a/march=armv7-r/march=armv7-m mfpu=neon/mfpu=vfpv3-d16/mfpu=fpv4-sp-d16 mfloat-abi=hard +MULTILIB_DIRNAMES = eb thumb armv6-m armv7-a armv7-r armv7-m neon vfpv3-d16 fpv4-sp-d16 hard + +# Enumeration of multilibs + +MULTILIB_EXCEPTIONS = +MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv6-m/mfpu=neon/mfloat-abi=hard +MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv6-m/mfpu=neon +MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv6-m/mfpu=vfpv3-d16/mfloat-abi=hard +MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv6-m/mfpu=vfpv3-d16 +MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv6-m/mfpu=fpv4-sp-d16/mfloat-abi=hard +MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv6-m/mfpu=fpv4-sp-d16 +MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv6-m/mfloat-abi=hard +MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv6-m +MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-a/mfpu=neon/mfloat-abi=hard +MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-a/mfpu=neon +MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-a/mfpu=vfpv3-d16/mfloat-abi=hard +MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-a/mfpu=vfpv3-d16 +MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-a/mfpu=fpv4-sp-d16/mfloat-abi=hard +MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-a/mfpu=fpv4-sp-d16 +MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-a/mfloat-abi=hard +MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-a +MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-r/mfpu=neon/mfloat-abi=hard +MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-r/mfpu=neon +# MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-r/mfpu=vfpv3-d16/mfloat-abi=hard +MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-r/mfpu=vfpv3-d16 +MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-r/mfpu=fpv4-sp-d16/mfloat-abi=hard +MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-r/mfpu=fpv4-sp-d16 +MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-r/mfloat-abi=hard +# MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-r +MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-m/mfpu=neon/mfloat-abi=hard +MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-m/mfpu=neon +MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-m/mfpu=vfpv3-d16/mfloat-abi=hard +MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-m/mfpu=vfpv3-d16 +MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-m/mfpu=fpv4-sp-d16/mfloat-abi=hard +MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-m/mfpu=fpv4-sp-d16 +MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-m/mfloat-abi=hard +MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-m +MULTILIB_EXCEPTIONS += mbig-endian/mthumb/mfpu=neon/mfloat-abi=hard +MULTILIB_EXCEPTIONS += mbig-endian/mthumb/mfpu=neon +MULTILIB_EXCEPTIONS += mbig-endian/mthumb/mfpu=vfpv3-d16/mfloat-abi=hard +MULTILIB_EXCEPTIONS += mbig-endian/mthumb/mfpu=vfpv3-d16 +MULTILIB_EXCEPTIONS += mbig-endian/mthumb/mfpu=fpv4-sp-d16/mfloat-abi=hard +MULTILIB_EXCEPTIONS += mbig-endian/mthumb/mfpu=fpv4-sp-d16 +MULTILIB_EXCEPTIONS += mbig-endian/mthumb/mfloat-abi=hard +MULTILIB_EXCEPTIONS += mbig-endian/mthumb +MULTILIB_EXCEPTIONS += mbig-endian/march=armv6-m/mfpu=neon/mfloat-abi=hard +MULTILIB_EXCEPTIONS += mbig-endian/march=armv6-m/mfpu=neon +MULTILIB_EXCEPTIONS += mbig-endian/march=armv6-m/mfpu=vfpv3-d16/mfloat-abi=hard +MULTILIB_EXCEPTIONS += mbig-endian/march=armv6-m/mfpu=vfpv3-d16 +MULTILIB_EXCEPTIONS += mbig-endian/march=armv6-m/mfpu=fpv4-sp-d16/mfloat-abi=hard +MULTILIB_EXCEPTIONS += mbig-endian/march=armv6-m/mfpu=fpv4-sp-d16 +MULTILIB_EXCEPTIONS += mbig-endian/march=armv6-m/mfloat-abi=hard +MULTILIB_EXCEPTIONS += mbig-endian/march=armv6-m +MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-a/mfpu=neon/mfloat-abi=hard +MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-a/mfpu=neon +MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-a/mfpu=vfpv3-d16/mfloat-abi=hard +MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-a/mfpu=vfpv3-d16 +MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-a/mfpu=fpv4-sp-d16/mfloat-abi=hard +MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-a/mfpu=fpv4-sp-d16 +MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-a/mfloat-abi=hard +MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-a +MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-r/mfpu=neon/mfloat-abi=hard +MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-r/mfpu=neon +MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-r/mfpu=vfpv3-d16/mfloat-abi=hard +MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-r/mfpu=vfpv3-d16 +MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-r/mfpu=fpv4-sp-d16/mfloat-abi=hard +MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-r/mfpu=fpv4-sp-d16 +MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-r/mfloat-abi=hard +MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-r +MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-m/mfpu=neon/mfloat-abi=hard +MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-m/mfpu=neon +MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-m/mfpu=vfpv3-d16/mfloat-abi=hard +MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-m/mfpu=vfpv3-d16 +MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-m/mfpu=fpv4-sp-d16/mfloat-abi=hard +MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-m/mfpu=fpv4-sp-d16 +MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-m/mfloat-abi=hard +MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-m +MULTILIB_EXCEPTIONS += mbig-endian/mfpu=neon/mfloat-abi=hard +MULTILIB_EXCEPTIONS += mbig-endian/mfpu=neon +MULTILIB_EXCEPTIONS += mbig-endian/mfpu=vfpv3-d16/mfloat-abi=hard +MULTILIB_EXCEPTIONS += mbig-endian/mfpu=vfpv3-d16 +MULTILIB_EXCEPTIONS += mbig-endian/mfpu=fpv4-sp-d16/mfloat-abi=hard +MULTILIB_EXCEPTIONS += mbig-endian/mfpu=fpv4-sp-d16 +MULTILIB_EXCEPTIONS += mbig-endian/mfloat-abi=hard +MULTILIB_EXCEPTIONS += mbig-endian +MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfpu=neon/mfloat-abi=hard +MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfpu=neon +MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfpu=vfpv3-d16/mfloat-abi=hard +MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfpu=vfpv3-d16 +MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfpu=fpv4-sp-d16/mfloat-abi=hard +MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfpu=fpv4-sp-d16 +MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfloat-abi=hard +# MULTILIB_EXCEPTIONS += mthumb/march=armv6-m +# MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfpu=neon/mfloat-abi=hard +MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfpu=neon +MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfpu=vfpv3-d16/mfloat-abi=hard +MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfpu=vfpv3-d16 +MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfpu=fpv4-sp-d16/mfloat-abi=hard +MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfpu=fpv4-sp-d16 +MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfloat-abi=hard +# MULTILIB_EXCEPTIONS += mthumb/march=armv7-a +MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfpu=neon/mfloat-abi=hard +MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfpu=neon +# MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfpu=vfpv3-d16/mfloat-abi=hard +MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfpu=vfpv3-d16 +MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfpu=fpv4-sp-d16/mfloat-abi=hard +MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfpu=fpv4-sp-d16 +MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfloat-abi=hard +# MULTILIB_EXCEPTIONS += mthumb/march=armv7-r +MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfpu=neon/mfloat-abi=hard +MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfpu=neon +MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfpu=vfpv3-d16/mfloat-abi=hard +MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfpu=vfpv3-d16 +# MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfpu=fpv4-sp-d16/mfloat-abi=hard +MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfpu=fpv4-sp-d16 +MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfloat-abi=hard +# MULTILIB_EXCEPTIONS += mthumb/march=armv7-m +MULTILIB_EXCEPTIONS += mthumb/mfpu=neon/mfloat-abi=hard +MULTILIB_EXCEPTIONS += mthumb/mfpu=neon +MULTILIB_EXCEPTIONS += mthumb/mfpu=vfpv3-d16/mfloat-abi=hard +MULTILIB_EXCEPTIONS += mthumb/mfpu=vfpv3-d16 +MULTILIB_EXCEPTIONS += mthumb/mfpu=fpv4-sp-d16/mfloat-abi=hard +MULTILIB_EXCEPTIONS += mthumb/mfpu=fpv4-sp-d16 +MULTILIB_EXCEPTIONS += mthumb/mfloat-abi=hard +# MULTILIB_EXCEPTIONS += mthumb +MULTILIB_EXCEPTIONS += march=armv6-m/mfpu=neon/mfloat-abi=hard +MULTILIB_EXCEPTIONS += march=armv6-m/mfpu=neon +MULTILIB_EXCEPTIONS += march=armv6-m/mfpu=vfpv3-d16/mfloat-abi=hard +MULTILIB_EXCEPTIONS += march=armv6-m/mfpu=vfpv3-d16 +MULTILIB_EXCEPTIONS += march=armv6-m/mfpu=fpv4-sp-d16/mfloat-abi=hard +MULTILIB_EXCEPTIONS += march=armv6-m/mfpu=fpv4-sp-d16 +MULTILIB_EXCEPTIONS += march=armv6-m/mfloat-abi=hard +MULTILIB_EXCEPTIONS += march=armv6-m +MULTILIB_EXCEPTIONS += march=armv7-a/mfpu=neon/mfloat-abi=hard +MULTILIB_EXCEPTIONS += march=armv7-a/mfpu=neon +MULTILIB_EXCEPTIONS += march=armv7-a/mfpu=vfpv3-d16/mfloat-abi=hard +MULTILIB_EXCEPTIONS += march=armv7-a/mfpu=vfpv3-d16 +MULTILIB_EXCEPTIONS += march=armv7-a/mfpu=fpv4-sp-d16/mfloat-abi=hard +MULTILIB_EXCEPTIONS += march=armv7-a/mfpu=fpv4-sp-d16 +MULTILIB_EXCEPTIONS += march=armv7-a/mfloat-abi=hard +MULTILIB_EXCEPTIONS += march=armv7-a +MULTILIB_EXCEPTIONS += march=armv7-r/mfpu=neon/mfloat-abi=hard +MULTILIB_EXCEPTIONS += march=armv7-r/mfpu=neon +MULTILIB_EXCEPTIONS += march=armv7-r/mfpu=vfpv3-d16/mfloat-abi=hard +MULTILIB_EXCEPTIONS += march=armv7-r/mfpu=vfpv3-d16 +MULTILIB_EXCEPTIONS += march=armv7-r/mfpu=fpv4-sp-d16/mfloat-abi=hard +MULTILIB_EXCEPTIONS += march=armv7-r/mfpu=fpv4-sp-d16 +MULTILIB_EXCEPTIONS += march=armv7-r/mfloat-abi=hard +MULTILIB_EXCEPTIONS += march=armv7-r +MULTILIB_EXCEPTIONS += march=armv7-m/mfpu=neon/mfloat-abi=hard +MULTILIB_EXCEPTIONS += march=armv7-m/mfpu=neon +MULTILIB_EXCEPTIONS += march=armv7-m/mfpu=vfpv3-d16/mfloat-abi=hard +MULTILIB_EXCEPTIONS += march=armv7-m/mfpu=vfpv3-d16 +MULTILIB_EXCEPTIONS += march=armv7-m/mfpu=fpv4-sp-d16/mfloat-abi=hard +MULTILIB_EXCEPTIONS += march=armv7-m/mfpu=fpv4-sp-d16 +MULTILIB_EXCEPTIONS += march=armv7-m/mfloat-abi=hard +MULTILIB_EXCEPTIONS += march=armv7-m +MULTILIB_EXCEPTIONS += mfpu=neon/mfloat-abi=hard +MULTILIB_EXCEPTIONS += mfpu=neon +MULTILIB_EXCEPTIONS += mfpu=vfpv3-d16/mfloat-abi=hard +MULTILIB_EXCEPTIONS += mfpu=vfpv3-d16 +MULTILIB_EXCEPTIONS += mfpu=fpv4-sp-d16/mfloat-abi=hard +MULTILIB_EXCEPTIONS += mfpu=fpv4-sp-d16 +MULTILIB_EXCEPTIONS += mfloat-abi=hard diff --git a/gcc/config/arm/t-rtems-eabi b/gcc/config/arm/t-rtems-eabi deleted file mode 100644 index 92c4dcb1288..00000000000 --- a/gcc/config/arm/t-rtems-eabi +++ /dev/null @@ -1,167 +0,0 @@ -# Custom RTEMS EABI multilibs - -MULTILIB_OPTIONS = mbig-endian mthumb march=armv6-m/march=armv7-a/march=armv7-r/march=armv7-m mfpu=neon/mfpu=vfpv3-d16/mfpu=fpv4-sp-d16 mfloat-abi=hard -MULTILIB_DIRNAMES = eb thumb armv6-m armv7-a armv7-r armv7-m neon vfpv3-d16 fpv4-sp-d16 hard - -# Enumeration of multilibs - -MULTILIB_EXCEPTIONS = -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv6-m/mfpu=neon/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv6-m/mfpu=neon -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv6-m/mfpu=vfpv3-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv6-m/mfpu=vfpv3-d16 -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv6-m/mfpu=fpv4-sp-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv6-m/mfpu=fpv4-sp-d16 -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv6-m/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv6-m -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-a/mfpu=neon/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-a/mfpu=neon -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-a/mfpu=vfpv3-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-a/mfpu=vfpv3-d16 -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-a/mfpu=fpv4-sp-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-a/mfpu=fpv4-sp-d16 -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-a/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-a -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-r/mfpu=neon/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-r/mfpu=neon -# MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-r/mfpu=vfpv3-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-r/mfpu=vfpv3-d16 -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-r/mfpu=fpv4-sp-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-r/mfpu=fpv4-sp-d16 -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-r/mfloat-abi=hard -# MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-r -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-m/mfpu=neon/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-m/mfpu=neon -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-m/mfpu=vfpv3-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-m/mfpu=vfpv3-d16 -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-m/mfpu=fpv4-sp-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-m/mfpu=fpv4-sp-d16 -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-m/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-m -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/mfpu=neon/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/mfpu=neon -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/mfpu=vfpv3-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/mfpu=vfpv3-d16 -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/mfpu=fpv4-sp-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/mfpu=fpv4-sp-d16 -MULTILIB_EXCEPTIONS += mbig-endian/mthumb/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/mthumb -MULTILIB_EXCEPTIONS += mbig-endian/march=armv6-m/mfpu=neon/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/march=armv6-m/mfpu=neon -MULTILIB_EXCEPTIONS += mbig-endian/march=armv6-m/mfpu=vfpv3-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/march=armv6-m/mfpu=vfpv3-d16 -MULTILIB_EXCEPTIONS += mbig-endian/march=armv6-m/mfpu=fpv4-sp-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/march=armv6-m/mfpu=fpv4-sp-d16 -MULTILIB_EXCEPTIONS += mbig-endian/march=armv6-m/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/march=armv6-m -MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-a/mfpu=neon/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-a/mfpu=neon -MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-a/mfpu=vfpv3-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-a/mfpu=vfpv3-d16 -MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-a/mfpu=fpv4-sp-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-a/mfpu=fpv4-sp-d16 -MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-a/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-a -MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-r/mfpu=neon/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-r/mfpu=neon -MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-r/mfpu=vfpv3-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-r/mfpu=vfpv3-d16 -MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-r/mfpu=fpv4-sp-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-r/mfpu=fpv4-sp-d16 -MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-r/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-r -MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-m/mfpu=neon/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-m/mfpu=neon -MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-m/mfpu=vfpv3-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-m/mfpu=vfpv3-d16 -MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-m/mfpu=fpv4-sp-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-m/mfpu=fpv4-sp-d16 -MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-m/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-m -MULTILIB_EXCEPTIONS += mbig-endian/mfpu=neon/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/mfpu=neon -MULTILIB_EXCEPTIONS += mbig-endian/mfpu=vfpv3-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/mfpu=vfpv3-d16 -MULTILIB_EXCEPTIONS += mbig-endian/mfpu=fpv4-sp-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian/mfpu=fpv4-sp-d16 -MULTILIB_EXCEPTIONS += mbig-endian/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mbig-endian -MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfpu=neon/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfpu=neon -MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfpu=vfpv3-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfpu=vfpv3-d16 -MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfpu=fpv4-sp-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfpu=fpv4-sp-d16 -MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfloat-abi=hard -# MULTILIB_EXCEPTIONS += mthumb/march=armv6-m -# MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfpu=neon/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfpu=neon -MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfpu=vfpv3-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfpu=vfpv3-d16 -MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfpu=fpv4-sp-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfpu=fpv4-sp-d16 -MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfloat-abi=hard -# MULTILIB_EXCEPTIONS += mthumb/march=armv7-a -MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfpu=neon/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfpu=neon -# MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfpu=vfpv3-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfpu=vfpv3-d16 -MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfpu=fpv4-sp-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfpu=fpv4-sp-d16 -MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfloat-abi=hard -# MULTILIB_EXCEPTIONS += mthumb/march=armv7-r -MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfpu=neon/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfpu=neon -MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfpu=vfpv3-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfpu=vfpv3-d16 -# MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfpu=fpv4-sp-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfpu=fpv4-sp-d16 -MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfloat-abi=hard -# MULTILIB_EXCEPTIONS += mthumb/march=armv7-m -MULTILIB_EXCEPTIONS += mthumb/mfpu=neon/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mthumb/mfpu=neon -MULTILIB_EXCEPTIONS += mthumb/mfpu=vfpv3-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mthumb/mfpu=vfpv3-d16 -MULTILIB_EXCEPTIONS += mthumb/mfpu=fpv4-sp-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mthumb/mfpu=fpv4-sp-d16 -MULTILIB_EXCEPTIONS += mthumb/mfloat-abi=hard -# MULTILIB_EXCEPTIONS += mthumb -MULTILIB_EXCEPTIONS += march=armv6-m/mfpu=neon/mfloat-abi=hard -MULTILIB_EXCEPTIONS += march=armv6-m/mfpu=neon -MULTILIB_EXCEPTIONS += march=armv6-m/mfpu=vfpv3-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += march=armv6-m/mfpu=vfpv3-d16 -MULTILIB_EXCEPTIONS += march=armv6-m/mfpu=fpv4-sp-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += march=armv6-m/mfpu=fpv4-sp-d16 -MULTILIB_EXCEPTIONS += march=armv6-m/mfloat-abi=hard -MULTILIB_EXCEPTIONS += march=armv6-m -MULTILIB_EXCEPTIONS += march=armv7-a/mfpu=neon/mfloat-abi=hard -MULTILIB_EXCEPTIONS += march=armv7-a/mfpu=neon -MULTILIB_EXCEPTIONS += march=armv7-a/mfpu=vfpv3-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += march=armv7-a/mfpu=vfpv3-d16 -MULTILIB_EXCEPTIONS += march=armv7-a/mfpu=fpv4-sp-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += march=armv7-a/mfpu=fpv4-sp-d16 -MULTILIB_EXCEPTIONS += march=armv7-a/mfloat-abi=hard -MULTILIB_EXCEPTIONS += march=armv7-a -MULTILIB_EXCEPTIONS += march=armv7-r/mfpu=neon/mfloat-abi=hard -MULTILIB_EXCEPTIONS += march=armv7-r/mfpu=neon -MULTILIB_EXCEPTIONS += march=armv7-r/mfpu=vfpv3-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += march=armv7-r/mfpu=vfpv3-d16 -MULTILIB_EXCEPTIONS += march=armv7-r/mfpu=fpv4-sp-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += march=armv7-r/mfpu=fpv4-sp-d16 -MULTILIB_EXCEPTIONS += march=armv7-r/mfloat-abi=hard -MULTILIB_EXCEPTIONS += march=armv7-r -MULTILIB_EXCEPTIONS += march=armv7-m/mfpu=neon/mfloat-abi=hard -MULTILIB_EXCEPTIONS += march=armv7-m/mfpu=neon -MULTILIB_EXCEPTIONS += march=armv7-m/mfpu=vfpv3-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += march=armv7-m/mfpu=vfpv3-d16 -MULTILIB_EXCEPTIONS += march=armv7-m/mfpu=fpv4-sp-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += march=armv7-m/mfpu=fpv4-sp-d16 -MULTILIB_EXCEPTIONS += march=armv7-m/mfloat-abi=hard -MULTILIB_EXCEPTIONS += march=armv7-m -MULTILIB_EXCEPTIONS += mfpu=neon/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mfpu=neon -MULTILIB_EXCEPTIONS += mfpu=vfpv3-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mfpu=vfpv3-d16 -MULTILIB_EXCEPTIONS += mfpu=fpv4-sp-d16/mfloat-abi=hard -MULTILIB_EXCEPTIONS += mfpu=fpv4-sp-d16 -MULTILIB_EXCEPTIONS += mfloat-abi=hard