From: Clifford Wolf <clifford@clifford.at>
Date: Fri, 3 May 2019 07:22:26 +0000 (+0200)
Subject: Further improve unused-detection for opt_clean driver-driver conflict warning
X-Git-Tag: yosys-0.9~142^2~1
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=5c2c0b4bb2ade51396da3acbcce0d5916fb1c7d6;p=yosys.git

Further improve unused-detection for opt_clean driver-driver conflict warning

Signed-off-by: Clifford Wolf <clifford@clifford.at>
---

diff --git a/passes/opt/opt_clean.cc b/passes/opt/opt_clean.cc
index f287fdcff..fcb662b59 100644
--- a/passes/opt/opt_clean.cc
+++ b/passes/opt/opt_clean.cc
@@ -89,9 +89,12 @@ void rmunused_module_cells(Module *module, bool verbose)
 	dict<SigBit, pool<Cell*>> wire2driver;
 	dict<SigBit, vector<string>> driver_driver_logs;
 
+	SigMap raw_sigmap;
 	for (auto &it : module->connections_) {
-		for (auto raw_bit : it.second)
-			used_raw_bits.insert(raw_bit);
+		for (int i = 0; i < GetSize(it.second); i++) {
+			if (it.second[i].wire != nullptr)
+				raw_sigmap.add(it.first[i], it.second[i]);
+		}
 	}
 
 	for (auto &it : module->cells_) {
@@ -104,7 +107,7 @@ void rmunused_module_cells(Module *module, bool verbose)
 					continue;
 				auto bit = sigmap(raw_bit);
 				if (bit.wire == nullptr)
-					driver_driver_logs[raw_bit].push_back(stringf("Driver-driver conflict "
+					driver_driver_logs[raw_sigmap(raw_bit)].push_back(stringf("Driver-driver conflict "
 							"for %s between cell %s.%s and constant %s in %s: Resolved using constant.",
 							log_signal(raw_bit), log_id(cell), log_id(it2.first), log_signal(bit), log_id(module)));
 				if (bit.wire != nullptr)
@@ -124,7 +127,7 @@ void rmunused_module_cells(Module *module, bool verbose)
 			for (auto c : wire2driver[bit])
 				queue.insert(c), unused.erase(c);
 			for (auto raw_bit : SigSpec(wire))
-				used_raw_bits.insert(raw_bit);
+				used_raw_bits.insert(raw_sigmap(raw_bit));
 		}
 	}
 
@@ -159,7 +162,7 @@ void rmunused_module_cells(Module *module, bool verbose)
 		for (auto &it2 : cell->connections()) {
 			if (ct_all.cell_known(cell->type) && !ct_all.cell_input(cell->type, it2.first))
 				continue;
-			for (auto raw_bit : it2.second)
+			for (auto raw_bit : raw_sigmap(it2.second))
 				used_raw_bits.insert(raw_bit);
 		}
 	}